Errata Sheet - Infineon
Errata Sheet - Infineon
Errata Sheet - Infineon
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<strong>Errata</strong> <strong>Sheet</strong><br />
XC161CS-32F, (E)ES-BB, BB<br />
History List/Change Summary<br />
Table 5<br />
Documentation Update<br />
Name Short Description Change<br />
INT_X.D1 Interrupt Vector Location of CAPCOM Register 28<br />
RSTLEN_X.D1 Duration of Internal Reset Sequence<br />
WDTCON_X.D1 Write access to register WDTCON<br />
PORTS_X.<br />
D2_144<br />
SCU_X.D2.2<br />
SCU_X.D3<br />
SCU_X.D5<br />
SCU_X.D6<br />
FLASH_X.D1<br />
Internal Pull-up Devices active on P4.0-3 and P3.12 during<br />
Reset<br />
Functionality of register OPSEN<br />
Register PLLCON after software reset<br />
VCO band after hardware/watchdog reset in single chip<br />
mode<br />
Register Security Mechanism - Unprotected Mode active<br />
until execution of EINIT instruction<br />
Interaction between Program Flash and Security Sector<br />
Programming<br />
TwinCAN_AI.D1 Reserved Bits in Registers of the TwinCAN Module<br />
CPU_X.D1 Write Operations to Control Registers<br />
ADC_X.D3 ADC Sample Time with Improved/Enhanced Timing<br />
Control<br />
ID-Registers ID-Registers<br />
<strong>Errata</strong> <strong>Sheet</strong> 5/50 V1.1, 2007-06-21
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