Errata Sheet - Infineon

Errata Sheet
XC161CS-32F, (E)ES-BB, BB
Functional Problems
(e.g. stack models), to perform branches within or between code segments. Two
methods basically exist for manipulations of the return address:
• M1: the return address contained in the last stack frame is directly modified:
[SP]+4: CSP o --> CSP m ; CSP value originally pushed is modified to CSP m [SP]+2:
IP o --> IP m ; IP value originally pushed is modified to IP m [SP]:
• M2: an additional frame with a new return (branch target) address is pushed onto the
system stack. The original return address is still available on the system stack:
[SP]+4: CSP o ; CSP value originally pushed on system stack by last CALLS
[SP]+2: IP o ; IP value originally pushed on system stack by last CALL(S)
[SP]: CSP m ; CSP value additionally pushed on system stack
[SP]-2: IP o ; IP value additionally pushed on system stack
[SP]:
In order to optimize the execution speed of return instructions, the C166S V2 core
additionally stores (mirrors) the 24-bit return address information (CSP r :IP r , r=1..6) of the
last up to 6 subroutine calls (invoked by CALLA/R/I/S, PCALL) in a ’last in/first out’
Return Stack (see User’s Manual, IFU Block Diagram). Whenever one of the return
instructions RET, RETS, RETP is executed, the information from the top of the Return
Stack is used to already start fetching the return target instruction. When the actual
return address from the system stack is available, it is compared with the information
from the Return Stack. In case of a mismatch, the instruction that was ’speculatively’
read with the address information obtained from the Return Stack is cancelled, and a
new fetch with the address from the system stack is started.
The Return Stack (including the potential performance increase) is not used in
combination with interrupts/traps and the corresponding RETI instruction.
The Return Stack can only provide a performance increase when identical return
addresses are delivered by the Return Stack and by the system stack. This is only the
case when the system stack is not manipulated by software, i.e.
• the return address on the system stack is not directly modified by software (method
M1)
• no additional ’return’ addresses are pushed on the system stack by software to
perform special branches (method M2), or RETI is used (after pushing PSW) to
return from a subroutine call. Otherwise, Return Stack and system stack are no
longer aligned, and the comparison of the return addresses will also fail for all
remaining Return Stack entries (r=1..5).
Problem Description:
When the return address on the system stack, composed of CSP m and/or IP m , is
modified by software, and the Return Stack is not empty, care must be taken that a valid
instruction is also located at
1. address CSP rtop :IP rtop when the next return instruction is RETS
2. address CSP C :IP rtop when the next return instruction is RET or RETP
Errata Sheet 9/50 V1.1, 2007-06-21