DEPFET Pixel Vertex Detector for the ILC - MPG HLL

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devices, biased in the same way (curve a. in the figure), show about the same threshold shift as in the previous irradiation. Based on these irradiation results we conclude, that DEPFETs biased accordingly to the operating conditions in the experiment are remarkably radiation tolerant. After a total ionizing dose of 1 Mrad(SiO 2 ), which corresponds to a safety factor of 10 for a 5 year operation in the first layer of the vertex detector at the ILC, the threshold voltage shift is only about −4 V. The shape of the DEPFET input characteristic and the transconductance are not affected by the irradiation (see Fig. 12). Hence the radiation induced threshold voltage shift can simply be compensated by a gradual decrease of the gate voltage needed for the selection of a pixel row. Although based on small number of irradiated devices, it can be stated, that identical DEPFETs, biased in the same way during irradiation, show a very similar characteristics after irradiation. Figure 12: Upper half: Input characteristics of six DEPFETs before (solid lines) and after (dashed lines) a 60 Co irradiation to a total ionizing dose of 912 krad (SiO 2 ). Lower half: Transconductance of all six transistors normalized to W/L=3 before and after irradiation 2.5 Wafer Thinning Back thinning of microelectronic chips is widely used in semiconductor industry. However, these technologies are not applicable for fully depleted sensors 14
with an electrically active backside. DEPFET pixel arrays have a structured implant, contacts, and metallization at the back side. Conventional thinning, i.e. chemical mechanical polishing (CMP) of the back side, is usually done after the top side processing is finished. The additional processing steps at the back side required for sensors would have to be done with a thin and fragile wafer, a procedure which is obviously extremely difficult and cost-intensive. Figure 13: Process sequence for production of thin silicon sensors with electrically active back side implant (see text) Figure 13 illustrates our approach to build such thin devices with a minimum of processing steps after thinning [15]. The process sequence starts with two oxidized silicon wafers. The top wafer will be the thin device wafer with the DEPFET matrix; the bottom one is the handle wafer which will later form the supporting frame. The back side implantation for the DEPFETs is already done at this stage of the processing (Fig. 13a.). These two wafers are then bonded directly to each other using a wafer bonding technique described in [16], forming a stack of two wafers with buried back side implants for the top wafer devices and silicon oxide in-between. After a high temperature annealing the cohesion between the two wafers is due to Si-O-Si bonds and the stack cannot be separated without breaking the wafer. The top wafer is then thinned to the desired thickness of the sensor matrix using conventional equipment for wafer grinding and polishing (Fig. 13b). The thermal and mechanical stability of this wafer stack is almost like for a conventional wafer and all subsequent process steps needed for microelectronic production can be done with the usual equipment for semiconductor manufacturing (Fig. 13c). The last step of the top side processing is the deposition and patterning of the passivation layer, leaving only the aluminium bond pads of the sensor uncovered. The back side passivation under the sensitive area of the sensor is removed and the silicon of the handle wafer is selectively etched 15
Page 1 and 2: DESY PRC R&D 03/01 Update 1(05) Pro
Page 3 and 4: 1 Introduction This status report s
Page 5 and 6: Figure 1: The DEPFET detector and a
Page 7 and 8: clear gate and DEPMOS gate, respect
Page 9 and 10: impact on the clear efficiency. A n
Page 11 and 12: gate_2 drain_2 global source common
Page 13 and 14: Figure 9: 3d simulation of the elec
Page 15: the first 3.5h and the threshold vo
Page 20 and 21: matrices, most notably the obtainab
Page 22 and 23: U (Cleargate) [V] 6 5 4 3 2 1 0 6 8
Page 24 and 25: of one module will have a size of
Page 26 and 27: Figure 22: Photograph of the SWITCH
Page 28 and 29: Figure 24: Micro photograph of the
Page 30 and 31: Figure 26: Radiogram of a 10µm thi
Page 32 and 33: The duty cycle of ≈ 1/200 given b
Page 34: [8] E. Gatti, P. Rehak: Semiconduct

DEPFET Pixel Vertex Detector for the ILC - MPG HLL

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