Podium Presentation Template - Semiconductor Wafer Test Workshop

More documents

Recommendations

Info

Direct Dock PCB Gap between contacts= 66.6um June 8 to 11, 2008 IEEE SW Test Workshop 14
Direct Dock PCB Design • Eliminates need for substrate (MLO, MLC) – Lower cost – No lead time for substrate fab – Analog in-house PCB design June 8 to 11, 2008 IEEE SW Test Workshop 15
Page 1 and 2: Robert Doherty Analog Devices, Inc.
Page 3 and 4: Overview • Analog Devices Inc. te
Page 5 and 6: Project Objective • Develop a low
Page 7 and 8: Vertical Probe Benefits • Longer
Page 9 and 10: Test Plan • Test a Power Manageme
Page 11 and 12: Comparison of Substrate vs Direct D
Page 13: Comparison of Substrate vs Direct D
Page 17 and 18: Vertical Direct Dock Probe Card •
Page 19 and 20: BeCu Pointed Saber ® Probe Propert
Page 21 and 22: Reduced Probe Marks • Pointed pro
Page 23 and 24: Results June 8 to 11, 2008 IEEE SW
Page 25 and 26: Results: Scrub Mark Comparison Vert
Page 27 and 28: Probe Mark Analysis - 5 um pad pene
Page 29 and 30: Cleaning Process Used • Using Int
Page 31 and 32: Testing Conclusions • Direct Dock
Page 33: Acknowledgements • John McHatton

Podium Presentation Template - Semiconductor Wafer Test Workshop

Create successful ePaper yourself

Delete template?

Save as template?