ARM Compiler toolchain v4.1 for µVision Using the Compiler

Using the Inline and Embedded Assemblers of the ARM Compiler
7.17 Expansion of inline assembler instructions that use constants
The constant in an instruction with a constant operand is not limited to the values permitted by
the instruction. Instead, the compiler translates the instruction into a sequence of instructions
with the same effect. For example:
ADD r0,r0,#1023
might be translated into:
ADD r0,r0,#1024 SUB r0,r0,#1
Another example of expansion possibility is:
MOV rn,0x12345678
With the exception of coprocessor instructions, all ARM instructions with a constant operand
support instruction expansion. In addition, the MUL instruction can be expanded into a sequence
of adds and shifts when the third operand is a constant.
The effect of updating the CPSR by an expanded instruction is:
• arithmetic instructions set the NZCV flags correctly
• logical instructions:
— set the NZ flags correctly
— do not change the V flag
— corrupt the C flag.
7.17.1 See also
Concepts
• Inline assembler and instruction expansion in C and C++ code on page 7-21
• Compiler support for inline assembly language on page 7-4.
ARM DUI 0375C Copyright © 2007-2008, 2011 ARM. All rights reserved. 7-22
ID061811
Non-Confidential