ARM Compiler toolchain v4.1 for µVision Using the Compiler

Using the Inline and Embedded Assemblers of the ARM Compiler
7.27 Inline assembler BL and SVC output value list in C and C++ code
The BL and SVC instructions of the inline assembler have the following format:
SVC{cond} svc_num, {input_param_list}, {output_value_list}, {corrupt_reg_list}
BL{cond} function, {input_param_list}, {output_value_list}, {corrupt_reg_list}
output_value_list specifies the physical registers that contain the output values from the BL or
SVC instruction and where they must be stored. The output values are specified as assignments
from physical registers to modifiable lvalue expressions or as single physical register names.
The inline assembler takes the values from the specified physical registers and assigns them into
the specified expressions. A physical register name specified without assignment causes the
virtual register of the same name to be updated with the value from the physical register.
For example, the instruction:
BL foo, { }, { result1=r0, r1 }
generates the following pseudocode:
BL foo MOV result1, (physical) r0 MOV (virtual) r1, (physical) r1
By default, if you do not specify any output_value_list output values, register r0 is used for
the output value.
Note
It is not possible to specify the lr, sp, or pc registers in the output value list.
7.27.1 See also
Concepts
• Inline assembler function calls and branches in C and C++ code on page 7-29
• Compiler support for inline assembly language on page 7-4.
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