04.11.2014 Views

Nuts & Volts

Nuts & Volts

Nuts & Volts

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

loads there are. Each contributes some capacitance<br />

on the line that must be charged so the lower the<br />

pull-up value, the faster the rise time and the greater<br />

the data rate. And don’t forget that the longer the<br />

bus lines, PC board copper, or cable, the greater the<br />

capacitance to charge, so lower pull-ups will give<br />

better performance. While the I 2 C system can accommodate<br />

up to 128 parallel devices on the line, rarely<br />

is even a fraction of this capacity used.<br />

While most I 2 C systems run at low speed from<br />

10 kbps to 100 kbps, there are faster versions<br />

available to run at 400 kbps up to 3.4 Mbps. These<br />

are typically used over shorter distances.<br />

As Figure 1 shows, the I 2 C bus devices are usually<br />

designated as either a master or slave. The master provides<br />

overall control of transmissions and supplies the clock to<br />

the slave devices. Only a master can initiate a data transfer.<br />

Slaves simply respond to read or write commands from the<br />

master. The master can be an IC designed for the purpose<br />

or, in most cases, it is actually built into an embedded controller.<br />

Many single chip microcontrollers include an I 2 C bus<br />

as a standard I/O port. The slave devices are usually other<br />

ICs designed to be set up and controlled over this bus.<br />

The I 2 C bus has a transmission protocol like all other<br />

networking methods. It is a synchronous bus meaning that<br />

the bit transfer is controlled by the clock. But it is also asynchronous<br />

since it can start and stop at any time as initiated<br />

by the master. It uses start and stop bits somewhat like those<br />

used in standard RS-232 UART serial port communications.<br />

The SDA line stays high until a one bit long binary 0<br />

(low) bit occurs. The SCL line goes low shortly thereafter,<br />

and the clock causes the serial data to be transferred. A<br />

stop sequence occurs when the SCL line goes high and<br />

stays high for a one bit period, then the SDA line rises back<br />

the the binary 1 or high condition.<br />

Data is designed to be transmitted in eight-bit bytes.<br />

These are accompanied by some control bits that determine<br />

what happens. Figure 2 shows the protocol. The data<br />

bit D7 is the MSB and is transmitted first. A ninth bit designated<br />

ACK follows the data bits. The ACK bit is transmitted<br />

by the receiving slave device to acknowledge the receipt of<br />

the data and this indicates it is ready for another transfer.<br />

The first transmission is usually the address that identifies<br />

the slave to be involved in a read or write operation. The<br />

format is shown in Figure 3. The address is seven bits long,<br />

giving a maximum of 2 7 = 128 possible slave devices. Address<br />

bit A6 is the MSB and is transmitted first. The I 2 C system<br />

includes a 10-bit addressing option but rarely is it ever<br />

used. The eighth bit transmitted is a read or write (R/W)<br />

bit that tells if the master is requesting the slave to be<br />

read from (binary 1) or written to (binary 0). The ninth<br />

bit is the ACK bit as described before.<br />

After the address is transmitted, the protocol usually<br />

calls for sending a code identifying a register in the<br />

slave that is to be read or written to. Some slave ICs<br />

have multiple registers that are either monitored by the<br />

master or written to. After the register number is sent,<br />

the data transfer is initiated. Then the sequence ends.<br />

■ FIGURE 2<br />

■ FIGURE 3<br />

Most I 2 C procedures are programmed as part of<br />

the embedded controller code in the product. Micros<br />

incorporating this bus have instructions and software to<br />

handle the I 2 C functions.<br />

I 2 C APPS<br />

As you can imagine, with such a simple and flexible<br />

protocol you can control and monitor almost anything.<br />

Changing channels on a TV set via the controller accepting<br />

inputs from a remote control is a classic example. You can<br />

use the bus to also control volume, color hue and balance,<br />

contrast, and other video settings. You can turn LEDs off or<br />

on or feed an LCD display with alphanumerics. You can<br />

also read from and write to RAM, ROM, or Flash memory.<br />

You can use it to feed data to serial analog-to-digital<br />

converters (ADCs) and digital-to-analog converters (DACs).<br />

Some frequency synthesizers in cell phones and radios get<br />

their frequency settings via an I 2 C bus. With an embedded<br />

controller and I 2 C circuits, you can implement almost any<br />

special monitor or control function you want.<br />

I 2 C DERIVATIVES<br />

OPEN COMMUNICATION<br />

The I 2 C bus has proved to be so versatile and successful<br />

that it has spawned a number of offshoots and enhancements.<br />

The most notable are the ACCESS bus, SMBus, and PMBus.<br />

The ACCESS bus uses the I 2 C basic format and protocol, but<br />

goes further in adding a +5 volt line. This creates a four-wire<br />

bus where the +5 volt line can be used to power external<br />

devices such as displays, keyboards, and other peripherals.<br />

The speed is set to 100 kbps and a maximum of 400 pF<br />

is designated for the bus capacitance. The ACCESS<br />

standard also specifies a type of cable up to 10 meters long<br />

April 2006 13

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!