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2012-2016 Microsystem Technology Strategy and Roadmaps

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Test, Measurement, Designfor-Test<br />

(DFT) Priorities<br />

Focus on provision of tools <strong>and</strong> methodologies aligned with<br />

testing <strong>and</strong> measurement required to support R&D involving<br />

microsystems <strong>and</strong> constituent technologies<br />

– Verification, validation <strong>and</strong> characterization<br />

– Hardware, software, embedded systems, integrated systems<br />

Themes are drawn from “parent” roadmaps,<br />

encompassing:<br />

– Test capabilities driven by More Moore (speed, frequency, complexity, power)<br />

– Harsh environment (temperature, power, radiation, etc.) testing for components <strong>and</strong> systems<br />

– 3D linked TSV <strong>and</strong> other interconnect technologies for heterogeneous or hybrid integration;<br />

DFT methodologies<br />

– Interconnect architectures (emerging st<strong>and</strong>ards) <strong>and</strong> smart fixtures to enable testability<br />

(wafer level, advanced probing, manufacturing oriented, reconfigurable)<br />

How:<br />

– CMC test equipment lending pool<br />

– Enabling access to test facilities. E.g. NMPTC, other university labs<br />

– System-level development platforms<br />

– Provision of CAD tools supporting DFT<br />

© <strong>2012</strong>, CMC <strong>Microsystem</strong>s <strong>Strategy</strong> <strong>and</strong> Roadmap, Work in Progress 32

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