80C186EB 80C188EB Users Manual 1990 - Al Kossow's Bitsavers

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__________________...... ~I! CLOCK GENERATOR ClKIN ClKOUT UCS, lCS, GCS7:0, TOOUT, TlOUT TXD1:0, I NCSI I HlDA,<strong>Al</strong>E, SINT1 A19:16 AD15:0, I S2:0, I RD,WR. DT/R, DEN, lOCK RESOUT 1-1 I I I I I I I I I I I I I IIIII~ I -,--r-r-"1I--,- I I I I I I I I I I I I I I I I I I I I I I I \,+':::'~"""""l--tll*",i I_-!i!! I I I I !\,-_: ----'-~- Minimum RESIN Resets High to First Bus Activity, low Time, 7 ClKOUT Periods 4ClKOUT Periods 270830-001-74 I I I I I I I I I I Figure 4.6. Warm Reset Waveform 4-6
CLOCK GENERATOR ClKIN RESIN RESYNC (INTERNAL) ClKOUT RESOUT CD Setup of RESIN to ClKIN falling. CD Next J transition of ClKIN starts RESYNC. CD J transition ends RESYNC. CD J of RESYNC resynchronizes the clock. CD 21 of ClKOUT later RESOUT goes low. 270830-001-75 Figure 4.7. Clock Synchronization 4-7
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LITERATURE To order Intel Literatur
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INTERNATIONAL LITERATURE ORDER FORM
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inter Intel Corporation makes no wa
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Table of Contents CHAPTER 1 INTRODU
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Table of Contents (continued) 8.1.2
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Table of Contents (continued) APPEN
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CHAPTER 1 INTRODUCTION The 80C 186E
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INTRODUCTION Some customers may not
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INTRODUCTION 80C186EB: This refers
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CHAPTER 2 OVERVIEW OF THE 80C186 FA
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OVERVIEW OF THE 80C186 FAMILY MODUL
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inter OVERVIEW OF THE 80C186 FAMILY
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Page 43 and 44: OVERVIEW OF THE 80C186 FAMILY MODUL
Page 57: Bus Interface Unit 3
Page 60 and 61: BUS INTERFACE UNIT '--lm I T. I~ I
Page 62 and 63: BUS INTERFACE UNIT 3.2 PHYSICAL ADD
Page 64 and 65: BUS INTERFACE UNIT Non-pipelinedEA
Page 66 and 67: BUS INTERFACE UNIT Any 80C 188 Core
Page 68 and 69: BUS INTERFACE UNIT LATCH ALE ~ READ
Page 70 and 71: BUS INTERFACE UNIT 3.4.3.1 TEST INP
Page 72 and 73: BUS INTERFACE UNIT CPU·DERIVED SIG
Page 74 and 75: BUS INTERFACE UNIT CLOCK OUT READY
Page 76 and 77: BUS INTERFACE UNIT 80C186 MODULAR C
Page 78 and 79: BUS INTERFACE UNIT 3.7.3 WAIT STATE
Page 80 and 81: BUS INTERFACE UNIT 1II0V mov out mo
Page 82 and 83: BUS INTERFACE UNIT 3.8.2 HOLD/HLDA
Page 84 and 85: BUS INTERFACE UNIT T,OR Tw T, CLOCK
Page 86 and 87: BUS INTERFACE UNIT A special mechan
Page 89 and 90: CHAPTER 4 CLOCK GENERATOR The clock
Page 91 and 92: CLOCK GENERATOR The RC tank circuit
Page 93: CLOCK GENERATOR ClKIN 1 1 1 1 Vee 1
Page 99 and 100: CHAPTERS PERIPHERAL CONTROL BLOCK A
Page 101 and 102: PERIPHERAL CONTROL BLOCK All commun
Page 103: inter PERIPHERAL CONTROL BLOCK 5.3
Page 107 and 108: CHAPTER 6 TIMER / COUNTER UNIT The
Page 109 and 110: TIMER/COUNTER UNIT TIMER 0 and TIME
Page 111 and 112: TIMER/COUNTER UNIT TIMER 1 TIMER 2
Page 113 and 114: inter TIMER/COUNTER UNIT YES NO YES
Page 115 and 116: TIMER/COUNTER UNIT 6.2 TIMER EVENTS
Page 117 and 118: TIMER/COUNTER UNIT When the timer i
Page 119 and 120: TIMER/COUNTER UNIT the write, the E
Page 121 and 122: TIMER/COUNTER UNIT bump_minute: mov
Page 123: TIMER/COUNTER UNIT set_count code x
Page 127 and 128: CHAPTER 7 CHIP SELECT/READY LOGIC U
Page 129 and 130: CHIP SELECT/READY LOGIC UNIT The Ch
Page 131 and 132: CHIP SELECT/READY LOGIC UNIT CHIP S
Page 133 and 134: CHIP SELECT/READY LOGIC UNIT Case 1
Page 135 and 136: CHIP SELECT/READY LOGIC UNIT EXAMPL
Page 137 and 138: CHIP SELECT/READY LOGIC UNIT READY
Page 139 and 140: inter CHIP SELECT/READY LOGIC UNIT
Page 141 and 142: CHIP SELECT/READY LOGIC UNIT 7.4 AP
Page 143 and 144: CHIP SELECT/READY LOGIC UNIT Exampl
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CHIP SELECT/READY LOGIC UNIT The fi
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inter CHIP SELECT/READY LOGIC UNIT
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intJ CHIP SELECT/READY LOGIC UNIT m
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CHAPTER 8 SERIAL COMMUNICATIONS UNI
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SERIAL COMMUNICATIONS UNIT BAUD RAT
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S&RIAl1.COMMUNICATIONS·UNIT SERIAL
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SERIAL COMMUNICATIONS UNIT 8.1.1.1
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SERIAL COMMUNICATIONS UNIT Initiall
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SERIAL COMMUNICATIONS UNIT Received
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SERIAL COMMUNICATIONS UNIT REN Bit:
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SERIAL COMMUNICATIONS UNIT The foll
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SERIAL COMMUNICATIONS UNIT CLKOUT T
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SERIAL COMMUNICATIONS UNIT CTS SAMP
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SERIAL COMMUNICATIONS UNIT At the i
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SERIAL COMMUNICATIONS UNIT Example
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CHAPTER 9 INTERRUPTS 80C186EB famil
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intJ INTERRUPTS interrupted by high
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INTERRUPTS Interrupt on Overflow·
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INTERRUPTS 9.3.1 INTERRUPT LATENCY
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INTERRUPTS interrupt service routin
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INTERRUPTS 9.4 INTERRUPT CONTROL UN
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INTERRUPTS 9.4.2 INTERRUPT UNIT PRO
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INTERRUPTS INTERRUPT CONTROL REGIST
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INTERRUPTS 9.4.2.4 THE REQUEST REGI
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inter INTERRUPTS 9.4.2.6 THE PRIORI
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INTERRUPTS POLL AND POLL STATUS REG
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INTERRUPTS INTERRUPT STATUS REGISTE
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INTERRUPTS When the integrated Inte
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INTERRUPTS 9.4.4.3 INTERRUPT RESPON
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INTERRUPTS YES PRESENT INTERRUPT RE
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Refresh Control Unit 10
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intJ REFRESH CONTROL UNIT 10.1 REFR
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inter REF.RESH CONTROL UNIT REFRESH
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inl:el® REFRESH CONTROL UNIT REFRE
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REFRESH CONTROL UNIT TI T1 TI T1 T1
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Input/Output Port Unit 11
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INPUT/OUTPUT PORT UNIT F·BUS GCS7
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INPUT/OUTPUT PORT UNIT PORT 1 DIREC
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inter INPUT/OUTPUTPORT UNIT PORT 2
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INPUT/OUTPUT PORT UNIT FROM INTEGRA
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inter INPUT/OUTPUT PORT UNIT READ P
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INPUT/OUTPUT PORT UNIT PORT DIRECTI
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INPUTJOUTPUTPORT UNIT 11.4 PROGRAMM
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CHAPTER 12 POWER MANAGEMENT UNIT Th
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POWER MANAGEMENT UNIT 12.1 FUNCTION
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l .. "11 Ti Ti cO r:: CiJ I CLKOUT
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POWER MANAGEMENT UNIT 12.1.1.3 EXIT
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( ::!! cc c iii ... ~ i:» m ~. d:
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POWER MANAGEMENT UNIT PDTMR PIN r--
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O~: _______________________________
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POWER MANAGEMENT UNIT Example 1. ho
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CHAPTER 13 HARDWARE PROVISIONS FOR
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HARDWARE PROVISIONS FOR FLOATING PO
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ONCE Mode 14
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Differences Between the 80C 186 Fam
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APPENDIX A A.4 HOLD/HLDA VS. REQUES
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APPENDIX A INTERRUPTED STRING MOVE
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APPENDIX B SUMMARY OF DIFFERENCES B
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APPENDIX B B.1.2 SEMICONDUCTOR TECH
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APPENDIXB B.4INTERRUPT CONTROLLER T
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Differences Between 80C186EB and 80
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Synchronization Appendix 0
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APPENDIX 0 Thus, the output of this
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APPENDIXE Appendix E. Instruction S
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APPENDIX E Appendix E. Instruction
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APPENDIXE Appendix E. Instruction S
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Instruction Summary 2 AppendixF
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APPENDIX F 1ST BYTE HEX Appendix F.
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APPENDIXF 1ST BYTE HEX BINARY Appen
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APPENDIXF Appendix F. Machine Instr
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APPENDIX F 1ST BYTE HEX BINARY Appe
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APPENDIX F 1ST BYTE HEX BINARY Appe
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APPENDIXG LO HI 0 1 2 3 0 ADD ADD A
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APPENDIXH MODAL PIN STATES The tenn
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APPENDIX H Name Modal State Type De
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APPENDIXH Name Modal State Type Des
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inter ALABAMA ~~I ~:llord Dr .. #2
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intel~ DOMESTIC DISTRIBUTORS (Contd
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INTERNATIONAL SALES OFFICES AUSTRAL
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UNITED STATES Intel Corporation 306
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