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DATA 620/i SYSTEM REFERENCE MANUAL . - Al Kossow's Bitsavers

DATA 620/i SYSTEM REFERENCE MANUAL . - Al Kossow's Bitsavers

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ANA AND Memory and A Timing: 2 cycles<br />

17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 0<br />

~-T-! 15 M A<br />

L_..J.. _ .......----_---I~___........___________I<br />

I la-bit I<br />

option<br />

The logical-AND is performed between the contents of the A<br />

register and the contents of the effective memory location.<br />

The result is placed in the A register. If the same bit position<br />

of both the effective memory location and A contain a one,<br />

the result is a one. The truth table is shown below, where<br />

n = bit position:<br />

A(n}<br />

Condition<br />

Effective<br />

Memory<br />

Location (n)<br />

Result<br />

A(n}<br />

0 a<br />

0 1<br />

1 a<br />

1 1<br />

0<br />

0<br />

0<br />

1<br />

Indexing: Yes<br />

Indirect Addressing: Yes<br />

Registers <strong>Al</strong>tered: A<br />

3.2.2 Single-Word Non-Addressing Instructions<br />

The format of the single word non-addressing instruction class<br />

is shown in figure 2-5.<br />

The non-addressing single-word instructions include the control<br />

group, the shift group, and the register change group. The<br />

operation is defined by the M field. The address field (A) is<br />

not used by the control group instructions. For the shift group,<br />

the A fi e Id defi nes the type and number of sh ifts. For the<br />

register change group, the A field defines the type of transfer<br />

and the registers affected.<br />

3-14

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