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Figure 3-1.Intel QuickPath Interconnect Packet Visibility By The Physical Layer (Phit)Full Widthmode:Phit (18b)CRC3.2.1.1 Supported FrequenciesThe frequencies used on the Intel QuickPath Interconnect will be common for all ports.Support for normal operating mode of 4.8 GT/s, 5.86 GT/s or 6.4 GT/s is provided bythe Physical layer. Settings for the operational frequency is done through strappingpins.The Intel QuickPath Interconnect links will come out of reset in slow mode(66.66 MT/s) independent of the operational frequency. This is based purely on thereference clock (133 MHz) divided by four. Firmware will then program the Physicallayer to the operational frequency, followed by a soft reset of the Physical layer, atwhich point the new frequency takes over.Table 3-1.Intel QuickPath Interconnect Frequency Strapping OptionsQPIFREQSEL[1:0]Intel QuickPath Interconnect Operational Frequency Mode3.2.1.2 Supported WidthsThe IOH supports two full-width Intel QuickPath Interconnect ports. Bifurcation of onefull-width ports into two half-width ports is not supported.3.2.1.3 Physical Layer InitializationThe Intel QuickPath Interconnect physical layer initialization establishes:00 4.8 GT/s01 5.86 GT/s10 6.4 GT/s11 ReservedLink wellness through test pattern exchangeNegotiated width of the port for degraded mode (but NOT port splitting from fullwidth to half width)Presence of an Intel QuickPath Interconnect componentFrequency is determined via strapping pins. See Section 3.2.1.1 for details.See Section 3.2.1.5 for references to configuration registers in the physical layer usedin the initialization process.44 Intel ® 5520 Chipset and Intel ® 5500 Chipset Datasheet