Instruction Sets

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70 CHAPTER 2 <strong>Instruction</strong> <strong>Sets</strong>Example 2.3 shows how to implement an if statement.Example 2.3Implementing an if statement in ARMWe will use the following if statement as an example:if (a < b) {x = 5;y = c + d;}else x = c – d;The implementation uses two blocks of code, one for the true case and another for the falsecase. A branch may either fall through to the true case or branch to the false case:; compute and test the conditionADR r4,a ; get address for aLDR r0,[r4] ; get value of aADR r4,b ; get address for bLDR r1,[r4] ; get value of bCMP r0, r1 ; compare a < bBGE fblock ; if a >= b, take branch; the true block followsMOV r0,#5 ; generate value for xADR r4,x ; get address for xSTR r0,[r4] ; store value of xADR r4,c ; get address for cLDR r0,[r4] ; get value of cADR r4,d ; get address for dLDR r1,[r4] ; get value of dADD r0,r0,r1 ; compute c + dADR r4,y ; get address for ySTR r0,[r4] ; store value of yB after ; branch around the false block; the false block followsfblock ADR r4,c ; get address for cLDR r0,[r4] ; get value of cADR r4,d ; get address for dLDR r1,[r4] ; get value of dSUB r0,r0,r1 ; compute c – dADR r4,x ; get address for xSTR r0,[r4] ; store value of xafter ... ; code after the if statement
2.2 ARM Processor 71Example 2.4 illustrates an interesting way to implement multiway conditions.Example 2.4Implementing the C switch statement in ARMThe switch statement in C takes the following form:switch (test) {case 0: ... break;case 1: ... break;...}The above statement could be coded like an if statement by first testing test A, then test B,and so forth. However, it can be more efficiently implemented by using base-plus-offsetaddressing and building what is known as a branch table:ADR r2,test ; get address for testLDR r0,[r2] ; load value for testADR r1,switchtab ; load address for switch tableLDR r15,[r1,r0,LSL #2]switchtab DCD case0DCD case1...case0 ... ; code for case 0...case1 ... ; code for case 1...This implementation uses the value of test as an offset into a table, where the table holds theaddresses for the blocks of code that implement the various cases. The heart of this code isthe LDR instruction, which packs a lot of functionality into a single instruction:■ It shifts the value of r0 left two bits to turn the offset into a word address.■ It uses base-plus-offset addressing to add the left-shifted value of test (held in r0) to theaddress of the base of the table held in r1.■ It sets the PC (r15) to the new address computed by the instruction.Each case is implemented by a block of code that is located elsewhere in memory. Thebranch table begins at the location named switchtab. The DCD statement is a way of loadinga 32-bit address into memory at that point, so the branch table holds the addresses of thestarting points of the blocks that correspond to the cases.The loop is a very common C statement, particularly in signal processing code.Loops can be naturally implemented using conditional branches. Because loops
Page 2 and 3: 56 CHAPTER 2 Instruction SetsMemory
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Page 9 and 10: 2.2 ARM Processor 63The basic form
Page 11 and 12: 2.2 ARM Processor 65CMPCMNTSTTEQCom
Page 13 and 14: 2.2 ARM Processor 67this step. Thus
Page 15: 2.2 ARM Processor 69mode fetches a
Page 19 and 20: 2.2 ARM Processor 73while (i < N) {
Page 21 and 22: 2.2 ARM Processor 75the figure show
Page 23 and 24: 2.3 TI C55x DSP 77The C55x has a nu
Page 25 and 26: 2.3 TI C55x DSP 79register mnemonic
Page 27 and 28: 2.3 TI C55x DSP 81■■S offset is
Page 29 and 30: 2.3 TI C55x DSP 83This instruction
Page 31 and 32: 2.3 TI C55x DSP 85The C55x provides
Page 33 and 34: Questions 87Q2-3 Answer the followi
Page 35 and 36: Lab Exercises 89Q2-19 Where are C55

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