Instruction Sets

2.2 ARM Processor 5931 27 25 24 20 19 15 11 0cond00 X opcode S Rn Rd Format determined by X bitX 5 1 (represents operand 2):11 7 0#rot 8-bit immediateX 5 0 format:11 6 4 3 0#shift Sh 0 Rm11 7 6 4 3 0Rs0Sh1RmFIGURE 2.4Format of ARM data processing instructions.FIGURE 2.5Pseudo-ops for allocating memory.BIGBLOCK % 102.2 ARM PROCESSORIn this section, we concentrate on the ARM processor. ARM is actually a familyof RISC architectures that have been developed over many years. ARM does notmanufacture its own VLSI devices; rather, it licenses its architecture to companieswho either manufacture the CPU itself or integrate the ARM processor into a largersystem.The textual description of instructions, as opposed to their binary representation,is called an assembly language. ARM instructions are written one perline, starting after the first column. Comments begin with a semicolon and continueto the end of the line. A label, which gives a name to a memory location,comes at the beginning of the line, starting in the first column. Here is anexample:labelLDR r0,[r8]; a commentADD r4,r0,r1