Instruction Sets

82 CHAPTER 2 Instruction Setsregister ST2_55. For example, if bit AR0LC 1, then the main data page is suppliedby AR0H, the buffer start register is BSA01, and the buffer size register is BK03.The C55x supports two stacks:one for data and one for the system. Each stack isaddressed by a 16-bit address. These two stacks can be relocated to different spotsin the memory map by specifying a page using the high register: SP and SPH formXSP, the extended data stack; SSP and SPH form XSSP, the extended system stack.Note that both SP and SSP share the same page register SPH. XSP and XSSP hold23-bit addresses that correspond to data locations.The C55x supports three different stack configurations. These configurationsdepend on how the data and system stacks relate and how subroutine returns areimplemented.■■■In a dual 16-bit stack with fast return configuration,the data and system stacksare independent. A push or pop on the data stack does not affect the systemstack. The RETA and CFCT registers are used to implement fast subroutinereturns.In a dual 16-bit stack with slow return configuration, the data and systemstacks are independent. However, RETA and CFCT are not used for slow subroutinereturns; instead, the return address and loop context are stored onthe stack.In a 32-bit stack with slow return configuration,SP and SSP are both modifiedby the same amount on any stack operation.2.3.3 Data OperationsThe MOV instruction moves data between registers and memory:MOV src,dstA number of variations of MOV are possible. The instruction can be used to movefrom memory into a register, from a register to memory, between registers, or fromone memory location to another.TheADD instruction adds a source and destination together and stores the resultin the destination:ADD src,dstThis instruction produces dst dst src.The destination may be an accumulator oranother type.Variants allow constants to be added to the destination. Other variantsallow the source to be a memory location. The addition may also be performed ontwo accumulators, one of which has been shifted by a constant number of bits.Other variations are also defined.A dual addition performs two adds in parallel:ADD dual(Lmem),ACx,ACy