MIC-3358 User's Manual - ECA Services Ltd

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Figure 4.3: Advance BIOS features setup screenVirus WarningDuring and after the system boots up, any attempt to write to the boot sectoror partition table of the hard disk drive will halt the system. If thishappens, a warning message will be displayed. You can run the anti-virusprogram to locate the problem. If Virus Warning is disabled, no warningmessage will appear if anything attempts to access the boot sector or harddisk partition.CPU L1 & L2 CacheThe default value is Enabled.Enabled (default) Enable cacheDisabledDisable cacheNote: The internal cache is built in the processor.Quick Power On Self TestThis category speeds up Power On Self Test (POST) after you power onthe computer. If this is set to Enabled, BIOS will shorten or skip somecheck items during POST.Enabled (default)DisabledEnable quick POSTNormal POSTMIC-3358 User’s Manual 52
First/Second/Third Boot Device and Boot Other DeviceThe BIOS attempts to load the operating system from the devices in thesequence selected in these items. The settings are Floppy, LS120, HDD-0, SCSI, CDROM, HDD-1, HDD-2, HDD-3, ZIP100, USB-FDD, USB-ZIP, USB-CDROM, USB-HDD, LAN and Disabled.First boot deviceSecond boot deviceThird boot deviceDefaultFloppyHDD-0CD-ROMPS: When you boot by USB CD-ROM, please install Win XP with SP1 orWin 2000 with SP3.Swap Floppy DriveSwitches the floppy disk drives between being designated as A and B.Default is Disabled.Boot Up Floppy SeekDuring POST, BIOS will determine if the floppy disk drive installed is 40or 80 tracks. 360K type is 40 tracks while 760K, 1.2M and 1.44M are all80 tracks. Default is Enabled.Boot Up NumLock StatusThe default value is On.On (default)OffKeypad is numeric keys.Keypad is arrow keys.Gate A20 OptionNormalFast(default)The A20 signal is controlled by keyboard controller orchipset hardware.The A20 signal is controlled by port 92 or chipset specificmethod.53 Chapter 4
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MIC-33586U CompactPCI Intel ®Penti
Page 3 and 4:
CE NotificationThe MIC-3358, develo
Page 5 and 6:
ContentsChapter 1 Hardware Configur
Page 7 and 8:
4.1.2 Standard CMOS Setup..........
Page 9 and 10: CHAPTER1HardwareConfiguration
Page 11 and 12: PMC (PCI Mezzanine Card) IEEE1386.1
Page 13 and 14: • Display memory: 8MB SDRAM VRAM
Page 15 and 16: Table 1.2: JP1 jumper definition5V3
Page 17 and 18: Table 1.7: CN1 IDE Connector Defini
Page 19 and 20: Table 1.9: CN3 RJ-45 COM1 port Defi
Page 21 and 22: Table 1.11: CN5 USB 1.1/2.0 port De
Page 23 and 24: 3 MDIAX2+4 MDIAX3+5 MDIAX3-6 MDIAX2
Page 25 and 26: 41 +3.3V 42 SERR#43 C/BE1# 44 GND45
Page 27 and 28: It's automatic selection when SW1-1
Page 29 and 30: Figure 1.3: MIC-3358 jumpers and co
Page 31 and 32: 2. Disconnect power before making a
Page 33 and 34: CHAPTER2ConnectingPeripherals
Page 35 and 36: 2.4 Serial Ports (CN3 and Rear I/O)
Page 37 and 38: of MIC-3358 help you install and re
Page 39 and 40: CHAPTER3Driver Setup
Page 41 and 42: 3.3 CMM (Chassis Management Module)
Page 43 and 44: Figure 3.5: Select: Add a new devic
Page 45 and 46: Figure 3.9: Browse for driver on CD
Page 47 and 48: Figure 3.13: Click: NextFigure 3.14
Page 49 and 50: 3.3.2 Windows XP DriverFigure 3.17:
Page 51 and 52: Figure 3.21: Select: Add a new hard
Page 53 and 54: Figure 3.25: Select driver on CD-RO
Page 55 and 56: Figure 3.29: My computer: A-IPM dri
Page 57 and 58: CHAPTER4Award BIOS Setup
Page 59: 4.1.2 Standard CMOS SetupThe items
Page 63 and 64: Small logo (EPA) showDefault is Dis
Page 65 and 66: Delayed TransactionThe chipset has
Page 67 and 68: SMBus ConnectorUsers can select IPM
Page 69 and 70: ACPI FunctionThis category allows y
Page 71 and 72: Load Optimized Defaults (Y/N) ? NPr
Page 73 and 74: AppendixAWatchdog Timer
Page 75 and 76: 1070 RETURN2000 REM Subroutine #2,
Page 77 and 78: AppendixBPin Assignments
Page 79 and 80: B.2 J2 ConnectorTable B.2: J2 conne
Page 81 and 82: B.4 J5 ConnectorTable B.4: J5 conne
Page 83 and 84: 4000-40BF Motherboard resources5000
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