Rabbit 2000™ Microprocessor - UTN

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B.3 WaitStatesinCodeMemoryThere are two manifestations of the wait state bug in code memory. If wait states are enabled, thereare certain instructions that will execute incorrectly and there are certain other instructions whoseuse will reduce the length of the output enable signal.B.3.1 Instructions Affected by the Wait State BugIf wait states in code memory are enabled, the 20 instructions in the table below execute incorrectlyand should not be used:Table 1. Rabbit 2000 Instructionsset b, (ix+d)res b, (ix+d)bit b, (ix+d)rl (ix+d)rlc(ix+drr (ix+d)rrc (ix+d)sla (ix+d)sra (ix+d)srl (ix+d)set b, (iy+d)res b, (iy+d)bit b, (iy+d)rl (iy+d)rlc(iy+d)rr (iy+d)rrc (iy+d)sla (iy+d)sra (iy+d)srl (iy+d)These instructions work correctly if there are zero wait states. If wait states are desired, equivalentinstructions work without any problem. For example:SRA (IX+8) ; 13 clockscan be replaced by:LD B,(IX+8) ; 9 clocksSRA B ; 4 clocksLD(IX+8),B ; 10 clocksAny of the registers A, H, L, D, E, B, C can be used to hold the intermediate value, so you shouldbe able to find a free register.For:BIT 3,(IX+4) ; 10 clocksuse:LD B,(IX+4) ; 9 clocksBIT 3,B ; 4 clocks66 Rabbit 2000 Microprocessor
If the atomic nature of the operation is important then the operation can be shifted to the hl indexregister. For example:SET 3,(IX+4)Use instead:PUSH HLPUSH DELD HL,IXLD DE,4ADD HL,DESET 3,(HL)POP DEPOP HLB.3.1.1 Dynamic C version 7.05Starting with version 7.05, Dynamic C does not generate any of the instructions in Table 1, andthey are not used in the library routines. If any of these instructions are used in an application program,a warning will be generated by the compiler.B.3.1.2 Prior versions of Dynamic CIn versions of Dynamic C prior to 7.05, the library, SLICE.LIB, contains one of these instructions:bit b,(iy+d). Do not use wait states with slice statements in these earlier versions ofDynamic C. If any of the instructions in the table above are used in an application program, nowarning is generated and you are on your own.B.3.2 Output Enable Signal and Conditional JumpsIf wait states are enabled for code memory, the memory output enable signal is shortened by oneclock cycle for the first byte read after any conditional jump instruction that does not jump. This isnot the same as losing a wait state, and in some cases the shortened output enable signal will notcause a problem. The conditional jump instructions are:jp cc, mnjr cc, ecc (condition code) is one of the following:NZ, Zero flag not set;Z,Zeroflagset;NC, Carry flag not set;C, Carry flag set;LZ, Logical/Overflow flag is not set;LO, Logical/Overflow flag is set;P, Sign flag not set;M, Sign flag setcc (condition code) is one of the following:NZ, Zero flag not set;Z,Zeroflagset;NC, Carry flag not set;C, Carry flag set;djnz eDesigner’s Handbook 67
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Rabbit 2000 MicroprocessorDesigner
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Table of Contents1 Introduction ...
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Instructions Affected by the Wait S
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1. IntroductionThis manual is inten
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2. Rabbit Hardware DesignOverviewBe
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2.3 Power ConsumptionWhen minimum p
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3. Core Design and ComponentsCore d
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3.2 Basic Memory DesignNormally /CS
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3.3 PC Board Layout and Memory Line
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With a Rabbit-based system it is ea
Page 21 and 22: 3.4.2.3 High Frequency Oscillator C
Page 23 and 24: 3.4.2.4 Processor DecouplingThe int
Page 25 and 26: 4. How Dynamic C Cold Boots theTarg
Page 27 and 28: 4.2 Program Loading Process Overvie
Page 29 and 30: 5. Rabbit Memory OrganizationThe Ra
Page 31 and 32: 5.2.1 DefinitionsExtended Code: Ins
Page 33 and 34: 5.3.2 Paged Access in Extended Memo
Page 35 and 36: 6. The Rabbit BIOSWhen Dynamic C co
Page 37 and 38: 6.2 BIOS FlowchartThe following flo
Page 39 and 40: DATAORGBeginning logical address fo
Page 41 and 42: All origin statements must have a u
Page 43 and 44: 7. The System ID BlockThe BIOS supp
Page 45 and 46: 7.2 AccessThe BIOS will read the sy
Page 47 and 48: Table 4. The System ID Block (Conti
Page 49 and 50: 8. BIOS Support for ProgramCloningT
Page 51 and 52: 8.2.3 LED PatternsThe following tab
Page 53 and 54: 9. Low-Power Design and SupportTo g
Page 55 and 56: 9.1 Software Support for Low-Power
Page 57 and 58: 10. Memory PlanningThe following re
Page 59 and 60: 11. Flash MemoriesThe flash memorie
Page 61 and 62: Table 7. 32-Pin Flash Memories Supp
Page 63 and 64: The field flashXPC contains the XPC
Page 65 and 66: 12. Troubleshooting Tips for NewRab
Page 67 and 68: 80 24 80 //terminate bootstrap, sta
Page 69 and 70: Appendix A. Supported Rabbit 2000Ba
Page 71: Appendix B.Wait State BugB.1 Overvi
Page 75 and 76: B.4 Enabling Wait StatesMemory wait
Page 77: Legal NoticeRabbit Semiconductor pr
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Rabbit 2000™ Microprocessor - UTN

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