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Rabbit 2000™ Microprocessor - UTN

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B.4 Enabling Wait StatesMemory wait states can be specified independently for each of 4 different addressing zones in thememory space. The 4 memory bank control registers (MBxCR) control the wait states inserted formemory accesses in each zone. The number of wait states can be programmed as 0, 1, 2 or 4. Theprinciple reasons for enabling memory wait states are:1. During startup of the <strong>Rabbit</strong> 2000, wait states are automatically set to 4 wait states. Unless ithas been modified, the BIOS promptly sets the processor to zero wait states.2. Enabling wait states can be used as a strategy for reducing power consumption. This can still bedone if the restrictions and work-arounds detailed in this chapter are adhered to. For example,you don’t use the 20 instructions that execute incorrectly.3. A slow flash memory used for data storage may be interfaced to the processor as a memorydevice and it may require wait states. This will still work as long as only data accesses are madeto the memory. If instructions are to be executed from the memory, then the restrictions andwork-arounds detailed in this chapter must be adhered to.B.5 SummaryIn a typical design implementation, wait states are not used for access to the main instructionmemory. Normally the processor clock speed is selected so that with zero wait states the processormemory cycle is matched with the instruction memory access time. Hence, the wait state bug willnot be encountered by most users.If the memory used is fast enough to run at zero wait states and the 20 failing instructions are notused, then inserting wait states will not cause problems. Thus, when the <strong>Rabbit</strong> starts up after areset and maximum wait states are enabled there will not be a problem. Nor will there be a problemif wait states are inserted to conserve power. Controller boards produced by Z-World or <strong>Rabbit</strong>Semiconductor will not experience the wait state bug unless the default setup in the BIOS isoverridden.Z-World flash write routines may move code into RAM memory and execute it there in order toperform a write on the flash code memory. These routines automatically avoid any wait state bugproblems.Wait states in memory used for data are not a problem because of the compiler directive that canbe used to avoid the bug. There is no reason to avoid wait states for data memory.Designer’s Handbook 69

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