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Rabbit 2000™ Microprocessor - UTN

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B.3.2.1 Workaround for Wait State Bug with Conditional JumpsOne way to compensate for the shortened output enable signal is to add one more wait state thanwould otherwise be needed. An example of the memory access with the shortened output enablesignal is shown in the figure below.chip selectaddressoutput enablelost part of output enablesignalWait State Bug Memory Read, 1 Wait StateB.3.3 Output Enable Signal and Mul InstructionIf wait states are enabled for code memory, the length of the output enable signal is reduced to asingle clock cycle for the first instruction byte fetch after a multiply (mul) instruction. This is thelength the output enable signal would be if there were zero wait states. The read of this byte isalways a long read cycle (the same as 10 wait states) since it is shared with the execution ofmul.This effectively precludes the use of mul with wait states unless the following condition ismet: the length of time from the start of the output enable signal to when the data becomes readyto sample is less than 1 clock cycle - 9 nanoseconds.If the clock doubler is used alternate clocks may have slightly different lengths and a slightlystricter standard may need to be applied.B.3.4 Alternatives to Wait States in Code MemoryIf the code memory is slow and requires wait states at a certain clock speed, the simplest alternativeis to lower the clock speed so that no wait states will be required. Lowering the clock speed to2/3 of its previous value has the same effect as adding one wait state. Lowering the clock speed to1/2 is the same as 2 wait states. Lowering the clock speed to 1/3 is the same as 4 wait states.Theclock speed can be cut in half by turning of the clock doubler. The clock speed can be divided by 8by enabling the clock divider.Another way to avoid wait states is to run normally with the clock doubler enabled, and when youneed to execute code from the slower memory turn off the clock doubler. This doubles the lengthof the memory cycle, which is equivalent to adding 2 wait states.68 <strong>Rabbit</strong> 2000 <strong>Microprocessor</strong>

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