Carbon L2CC PL310 Model User Guide for SoC Designer

Setting Component Parameters 1-9Table 1-3 Component Parameters (Continued)SPNIDENWAYSIZEDefines the value used for theSPNIDEN input if it is left unconnected.This signal enables you tobypass security for output events.This must be set to true to enableprofiling (see “Available ProfilingData” on page 1-14).Defines the value used for theWAYSIZE input if it is leftunconnected.true, false false Yes1,2,3,4,5,6 7 1 ResetWaveform File 8 Name of the waveform file. string carbon_pl310.vcd NoWaveform TimescaleSets the timescale to be used inthe waveform.Many valuesin drop-down1 ns No1. Yes means the parameter can be dynamically changed during simulation, No means it can be changed onlywhen building the system, Reset means it can be changed during simulation, but its new value will be takeninto account only at the next reset.2. Effective associativity is respectively 8 (0) and 16 (1) ways.3. The square brackets used in parameter names specify a range of numbers that are available for the model. Theparameter name for the start addresses “axi_s[0-1] axi_start[0-5]” for example will be expanded to 12 possibleparameter name combinations that range from “axi_s0 axi_start0” to “axi_s1 axi_start5”. The size of amemory region depends on the “axi_s[N] axi_start[M]” and “axi_s[N] axi_size[M]” parameters. The endaddress is calculated as StartAddr +Size -1. The size of the memory region must not exceed the value of0x100000000. If the sum of StartAddr+Size is greater than 0x100000000, the size of the memory region isreduced to the difference: 0x100000000-StartAddr.4. Carbon recommends using the Memory Map Editor (MME) in SoC Designer Plus, which provides centralizedviewing and management of the memory regions available to the components in a system. For informationabout migrating existing systems to use the MME, refer to Chapter 9 of the SoC Designer Plus User Guide.5. The CFGADDRFILTSTART_31_20 and CFGADDRFILTEND_31_20 parameters, as well as the associatedinternal registers, hold the upper 12 bits of the address filtering values, not the full 32 bits.6. The REGFILEBASE parameter, as well as the REGFILEBASE input pin, represents the 20 most significantbits of the register file base address, not the full 32-bit address.7. Effective way size in KB is equal to 16*2 WAYSIZE-1 : 16, 32, 64,128, 256 or 512 KB.8. When enabled, SoC Designer Plus writes accumulated waveforms to the waveform file in the following situations:when the waveform buffer fills, when validation is paused and when validation finishes, and at the endof each validation run.Carbon Design Systems, Inc. Confidential