SERVICE MANUAL - Nexo

NXAMP4x4HGFEDCBA■ BLOCK DIAGRAM 5/5 NXAMP4x4 LEVEL DIAGRAMThis level diagram is for the purpose of circuit design only.The actual gain structure will depend on the firmware that is used.1Input_Amp(PCB INANH)Input_VR(PCB Control)ADC buffer(PCB Control)Digital DomainDAC buffer(PCB Control)Output_VR(PCB Control)Power_Amp(PCB PAANH)31 2CS3318CS4272 Codec +DSPCS33182-14dBFixed Gain0.25dB stepVariable Gain+6dBFixed Gain-0.4dBFixed Gain0.25dB stepVariable Gain+37dBFixed GainMAXIMUMLEVEL+43.8dBu3Maximum InputVoltage+28.0dBu4Sensitivity+10.0dBu-14.0dB+14.0dBu-12.5dB+6.0dB+7.5dBu+6.2dBu-0.4dB+5.8dBu+1dB+6.8dBu+1.5dBu-4.0dBu+5.5dB-96dB5Note:The solid line shows the gain structure in the analog test mode of the test program.The broken line shows an example in the setting that allows the maximum input signal level28CA1-2001022110-508