1 ECE 310L : L Read the lab assignment in its entirety. 1. For the ...

ECE 310L : LAB 10PRELAB ASSIGNMENT:Read the lab assignment in its entirety.1. For the circuit shown in Figure 3, compute a value for R1 that will result in a1N5230B zener diode current of approximately 5mA (you can ignore the effect ofbase current). Assume Vin is 8V.OBJECTIVES:Construct and verify the operation of an NMOS unity gain amplifier.Construct and verify the operation of a BJT unity gain amplifier.Use an emitter follower/source follower to improve the load regulation of a zener diodevoltage regulator.MATERIALS:DC Power supplyOscilloscopeSignal GeneratorDMMSolderless breadboadHookup WireResistors: VariousCapacitors: 10uF, 100nFDiode: 1N5230BTransistors: ZVN3306A, 2N2222ABACKGROUND:Some amplifiers are design to act primarily as buffers, where they isolate circuits byproviding high input impedance while a voltage gain of nearly one, or unity gain. Thecommon-drain NMOS amplifier shown in Figure 1 is one such amplifier, and iscommonly referred to as a source follower. The name source follower indicates theoutput is taken from the source and is in phase with input, i.e. V S “follows” V G . The termcommon drain comes from the idea that the drain is connected directly to V DD with noload resistance and in the AC analysis the supply rail, V DD , is a ground reference. Thevoltage gain (A V ) of the source follower is inherently less than one and is generally inthe range 0.8 – 0.9. The current gain can be much higher than one, though, allowing thesource follower to buffer between a high-impedance source and a low-impedance load.1

Figure 1A similar configuration that provides approximately unity gain along with currentamplification is the BJT common-collector amplifier or the emitter follower. The emitterfollower is the BJT equivalent of the NMOS source follower. This lab will explore theoperation of these amplifiers and examine the gain and phase response.Figure 22

The input coupling capacitors are very large, so their poles will be near 0. The lowfrequency response of the system will thus be determined by C 2 . The RC time constantwill set the cut-off frequency so in this design the significant time constant will be C 2 andthe equivalent resistance seen by C 2 .In the NMOS amplifier the time constant will be determined by the output capacitor, C 2 ,which is in series with the load resistor and the parallel combination of the source1resistor and the impedance seen in the NMOS source, .gmVGS2IDVTN1 1.2k|| 100k100nFg m In the BJT amplifier, the time constant will be determined by the output capacitor, C 2 ,which is in series with the load resistor and the parallel combination of the emitterresistor and the impedance seen in the BJT emitter, r e .1 rTHre , wheregm1 4.7k|| 4.7kre 40I200 1 470 || 40IccgmVITCg m4.7k|| 4.7k 100k100nF200 Then, you will use the NMOS source follower and the BJT emitter followerconfigurations to help improve the line/load regulation of a zener diode voltage regulatorand allow for higher load current. The BJT version of this circuit is shown in Figure 3.Figure 3SETUP:Turn on power to the DMM, oscilloscope, power supply, and signal generator. Set thepower supply +25V current limit to 100mA.3

Pay careful attention to the transistor pin-out as shown below to avoid damaging them.ZVN3306A pin-out2N2222A pin-outLAB ASSIGNMENT:1. Use the DMM to measure the values of the resistors. Use the measuredcomponent values in your calculations.2. Construct the circuit shown in Figure 1. Connect the oscilloscope to measure theinput and V OUT .3. Measure and record the operating point of the transistor (I D , V DS ). Note thatthere is no drain resistor to permit easy measurement of I D , but you canmeasure I S .4. Measure and plot the gain and phase characteristics of the amplifier from 10Hzto 100kHz. Use a 1Vpp sinusoid as the input.5. Increase the input signal peak-to-peak voltage until the output signal becomesdistorted or clips. What are the input and output voltage levels at this point? Howdo these voltages relate to the bias point of the amplifier?6. Construct the circuit shown in Figure 2.7. Measure and record the operating point of the transistor (I C , V CE ). Note thatthere is no collector resistor to permit easy measurement of I C , but you canmeasure I E .8. Measure and plot the gain and phase characteristics of the amplifier from 10Hzto 100kHz. Use a 1Vpp sinusoid as the input.9. Increase the input signal peak-to-peak voltage until the output signal becomesdistorted or clips. What are the input and output voltage levels at this point? Howdo these voltages relate to the bias point of the amplifier?10. Construct the circuit shown in Figure 3. Set Vin to 8V. Use a value for R1 that willresult in a 1N5230B zener diode current of approximately 5mA (you can ignorethe effect of base current). Use 10kΩ for the initial load resistor (this will beconsidered the no-load condition).4

11. Measure the output voltage V REG .12. Add a parallel load resistor that will increase the output current to approximately25 mA. Measure the output voltage V REG .13. Add a parallel load resistor that will increase the output current to approximately50 mA. Measure the output voltage V REG .14. Leave the load set to approximately 50mA, and reduce Vin to 7.2V. Measure theoutput voltage V REG .15. Increase Vin to 8.8V. Measure the output voltage V REG .16. Replace the BJT with the NMOS FET, and repeat steps 10-15.REPORT:Write your report per the criteria in the syllabus and the sample lab report posted onthe course web page.In your report, also answer the questions below;1. Plot your gain (dB) and phase measurements versus the input frequency. Use alogarithmic scale for frequency.2. How does the measured low-frequency response of the amplifiers compared tothe expected values?3. Compare the performance of the voltage regulators to each other. Calculate lineand load regulation for both regulator configurations.5