AVOIDING FURNACE SLIP IN THE ERA OF SHALLOW ... - MEMC

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Fig. 3: The LEFT photo shows slip steps at the edge of a P{100} wafer as revealed by an interference contrast microscope. The RIGHT photo shows dislocation etch pits at a P{100} wafer surface after HF strip-back and 3 min Schimmel etch (6). Fig. 4: The photo shows rows of diamond-shaped dislocation etch pits at the cleaved {110} surface in the center of a P/P+{100} epi wafer. The cleaved surface was etched for 3 min in Leo’s etch (7). Many large oxygen precipitation defects are also observed in the P+. Other slip characterization methods include Makyoh (magic mirror) topography (8), minority carrier recombination lifetime mapping (9), and scanning Lang transmission xray topography (10-12). Figure 5 shows an x-ray topography image. Fig. 5: X-ray topography image of one edge of an in-process P{100} wafer after HF stripback and 3 min Schimmel etch. The black spots are damage sites on the back side of the wafer and the many dark lines are dislocations in the wafer bulk. Page 777
When a boat of wafers is inserted into a tube furnace, furnace slip can occur as follows. The wafers are closely spaced in the furnace boat, and their initial temperature is low and uniform. As the wafers move into the furnace tube, radiation from the furnace tube heats up the outer edges of the wafers. Each wafer shadows the centers of the adjacent wafers, so the wafer centers heat up more slowly than the edges. A similar situation exists when the temperature of the furnace tube is ramped upward. The uneven heating causes the temperature of the outer edge of each wafer to increase faster than the temperature of the wafer center. The silicon around the wafer edge expands and softens as the local temperature rises, but the silicon in the center of the wafer expands less and remains stronger because of the slower rise in temperature there. If the stresses developed by the nonuniform expansion become large enough, then silicon-to-silicon bonds are sheared and the stresses are partially relieved by slip between individual {111} planes in the softened outer edge of the wafer. In the more severe cases, the silicon slips on many {111} planes and the net result is a bending of the softened silicon near the wafer edge to accommodate the increased wafer circumference. This plastic deformation creates many dislocations in localized regions near the wafer edge and causes the entire wafer to be warped. Figure 1 shows the typical shape of a wafer that has suffered severe furnace slip during a furnace insertion or temperature ramp-up. The shape can be described as that of a saddle, with two opposite edges turned up and the other two edges turned down. Sometimes the wafer appears to be folded along one of the two directions. The highest densities of dislocations are found at the locations where the local curvature is highest and are found at the surface which is locally concave (13). When a boat of wafers is withdrawn from a tube furnace or the tube temperature is ramped downward, furnace slip can occur as follows. The wafers are closely spaced in the furnace boat and their initial temperature is high and uniform. As the wafer environment is cooled, each wafer radiates energy from the edge and the temperature of the wafer edge decreases faster than the temperature of the wafer center. The silicon around the wafer edge shrinks and gets stronger as the temperature decreases, but the silicon in the center of the wafer shrinks more slowly and remains softer due to the slower decrease in the temperature there. The shrinking silicon around the wafer edge squeezes the wafer center and increases any preexisting wafer bow. If the compressive thermal stresses are great enough, then the stresses are partially relieved as inverted pyramids of silicon (bounded by {111} planes) slip toward the wafer surface in the center of the wafer on the concave side (3, 14, 15). In the more severe cases, plastic deformation in the wafer center leads to high dislocation densities and severe permanent bow. Figure 2 shows the typical shape of a wafer that has suffered severe center slip during a furnace withdrawal or a temperature ramp-down. The wafer is permanently bowed. A high density of dislocations is found in the central region of the wafer and a low density of dislocations is found at the wafer edge. As reported by Leroy and Plougonven (3), the dislocations in the center of the wafer are found near the concave surface. This is illustrated in Fig. 4. The wafer in Fig. 4 was bowed so that the front surface was concave. During cooling, the shrinking periphery increased the amount of Page 778
Page 1 and 2: In Semiconductor Silicon 2002, H.R.
Page 3: during furnace slip are lines of si
Page 7 and 8: at 800C, the insertion/withdrawal r
Page 9 and 10: Since the thermal oxidation of sili
Page 11 and 12: CONCLUSION During furnace processin

AVOIDING FURNACE SLIP IN THE ERA OF SHALLOW ... - MEMC

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