116 Anais Fujiwara, S., Bochman, G. V., Khen<strong>de</strong>k, F., Amalou, M., and Ghedamsi, A. (1991). Test selection based on finite state mo<strong>de</strong>ls. IEEE Transactions on Software Engineering, 17(6):591–603. Gill, A. (1962). Introduction to the Theory of Finite-State Machines. McGraw-Hill, New York. Gonenc, G. (1970). A method for <strong>de</strong>sign of fault <strong>de</strong>tection experiments. IEEE Transactions on Computers, 19(6):551–558. Hennie, F. C. (1964). Fault <strong>de</strong>tecting experiments for sequential circuits. pages 95–110. Hierons, R. M. (2004). Using a minimal number of resets when testing from a finite state machine. Inf. Process. Lett., 90(6):287–292. Hierons, R. M. and Ural, H. (2002). Reduced length checking sequences. IEEE Transactions on Computers, 51(9):1111–1117. Hierons, R. M. and Ural, H. (2006). Optimizing the length of checking sequences. IEEE Transactions on Computers, 55(5):618–629. Hogrefe, D. (1991). Osi formal speci cation case study: the inres protocol and service. Technical report, University of Bern. Lee, D. and Yannakakis, M. (1994). Testing finite-state machines: State i<strong>de</strong>ntification and verification. IEEE Trans. Comput., 43(3):306–320. Luo, G., Petrenko, R., and Bochmann, G. V. (1994). Selecting test sequences for partially-specified non<strong>de</strong>terministic finite state machines. In In IFIP 7th International <strong>Workshop</strong> on Protocol Test Systems, pages 91–106. McGill, R., Tukey, J. W., and Larsen, W. A. (1978). Variations of box plots. The American Statistician, 32(1):12–16. Petrenko, A., von Bochmann, G., and Yao, M. Y. (1996). On fault coverage of tests for finite state specifications. Computer Networks and ISDN Systems, 29(1):81– 106. Petrenko, A., Yevtushenko, N., Lebe<strong>de</strong>v, A., and Das, A. (1993). Non<strong>de</strong>terministic state machines in protocol conformance testing. In Protocol Test Systems, pages 363–378. Sidhu, D., Chung, A., and Blumer, T. P. (1991). Experience with formal methods in protocol <strong>de</strong>velopment. SIGCOMM Comput. Commun. Rev., 21(2):81–101. Simao, A. S. and Petrenko, A. (2008). Generating checking sequences for partial reduced finite state machines. In TestCom ’08 / FATES ’08: Proceedings of the 20th IFIP TC 6/WG 6.1 international conference on Testing of Software and Communicating Systems, pages 153–168, Berlin, Hei<strong>de</strong>lberg. Springer-Verlag. Simao, A. S. and Petrenko, A. (2009). Checking fsm test completeness based on sufficient conditions. IEEE Transactions on Computers. (Aceito para publicacao. Versão preliminar disponível em: www.crim.ca/Publications/2007/documents/plein texte/ASD PetA 0710 20.pdf).
<strong>XI</strong> <strong>Workshop</strong> <strong>de</strong> <strong>Testes</strong> e Tolerância a <strong>Falhas</strong> 117 Tan, Q. M., Petrenko, A., and Bochmann, G. V. (1996). A test generation tool for specifications in the form of state machines. In in Proceedings of the International Communications Conference, pages 225–229. Ural, H., Wu, X., and Zhang, F. (1997). On minimizing the lengths of checking sequences. IEEE Transactions on Computers, 46(1):93–99. Ural, H. and Zhang, F. (2006). Reducing the lengths of checking sequences by overlapping. Lecture Notes on Computer Science, (3964):274–288. Yao, M., Petrenko, A., and Bochmann, G. v. (1993). Conformance testing of protocol machines without reset. In Proceedings of the IFIP TC6/WG6.1 Thirteenth International Symposium on Protocol Specification, Testing and Verification <strong>XI</strong>II, pages 241–256, Amsterdam, The Netherlands, The Netherlands. North-Holland Publishing Co.
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