Rezumat teza Alin Tisan - Facultatea de Electronica ...
Rezumat teza Alin Tisan - Facultatea de Electronica ...
Rezumat teza Alin Tisan - Facultatea de Electronica ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
Neural Networks Implemented in FPGA, 30th International Spring Seminar on Electronics Technology,<br />
ISSE 2007. Technical University of Cluj‐Napoca, ROMANIA, May 9‐13, 2007, p. 507 ‐ 512, ISBN 1‐4244‐<br />
1218‐8, IEEE Catalog Number: 07EX1780C, Library of Congress: 2007924573<br />
26. Oniga, A. <strong>Tisan</strong>, D. Mic, A. Buchman, A. Vida‐Ratiu, Optimizing FPGA implementation of feed‐forward<br />
neural networks, Proce<strong>de</strong>engs of the 11th International Conference on Optimization of Electrical and<br />
Electronic Equipment OPTIM 2008, 2008, Brasov, Romania, May 22‐23, p. 31‐36, IEEE Catalog Number<br />
08EX1996, ISBN 1‐4244‐1544‐6, Library of the Congress 2007905111, ISBN 978‐973‐131‐032‐9.<br />
27. Oniga, A. <strong>Tisan</strong>, D. Mic, A. Buchman, C. Gavrincea, Hardware implementation of simple competitive<br />
neural networks with layer parallelism, International symposium for <strong>de</strong>sign and technology of<br />
electronics packaging, september 2007, pp19‐199, ISBN 978<br />
28. Pearce T.C., S. S. Schiffman; H. T. Nagle; J.W. Gardner (Editors). Handbook of Machine Olfaction:<br />
Electronic Nose Technology. VCH‐Wiley, 1 ed., 2003.<br />
29. Savran A., S. Unsal, Hardware Implementation of a Feedforward Neural Network using FPGAs.<br />
International Conference on Electrical and Electronics Engineering. Bursa, December 2003.<br />
30. Spaanenburg L., B. Hoefflinger, S. Neusser, J.A.G. Nijhuis, and A. Siggelkow. A Multiplier‐Less Digital<br />
Neural Network. Proc. MICRO‐NEURO’91, Kirill & Method Verlag, pp. 281‐289, 1991.<br />
31. <strong>Tisan</strong>, A. Buchman, S. Oniga, C. Gavrincea, A Generic Control Block for Feedforward Neural Network<br />
with On‐Chip Delta Rule Learning Algorithm, 30th International Spring Seminar on Electronics<br />
Technology, ISSE 2007. Technical University of Cluj‐Napoca, ROMANIA, May 9‐13, 2007, p. 567 ‐ 570,<br />
ISBN 1‐4244‐1218‐8, IEEE Catalog Number: 07EX1780C, Library of Congress: 2007924573<br />
32. <strong>Tisan</strong>, C. Gavrincea, S. Oniga, A Generic Building Block for Hebbian Neural Network with On‐Chip<br />
Learning, Buletin Stiintific Seria al Universitatii Politehnica din Timisoara, Seria <strong>Electronica</strong> si<br />
Telecomunicatii, Tom 51(65), Fascicola 1, 2006, ISSN1583‐3380, Cod CNCSIS 252, pag. 5‐8<br />
33. <strong>Tisan</strong>, C. Gavrincea, S. Oniga, Methods for embed<strong>de</strong>d systems <strong>de</strong>sign with on‐chip learning neural<br />
networks, International symposium for <strong>de</strong>sign and technology of electronics packaging, september<br />
2007, pp283‐287, ISBN 978‐973‐713‐188‐1<br />
34. <strong>Tisan</strong>, S. Oniga, A. Buchman, C. Gavrincea, Architecture and Algorithms for Syntetizable Neural<br />
Networks with On‐Chip Learning, 8‐th International Symposium on Signals, Circuits and Systems. ISSCS<br />
2007, Iasi, iulie 12 ‐13, vol 1, pag 265 – 268, ISBN 1‐4244‐0968‐3, IEEE Catalog Number: 07EX1678,<br />
Library of Congress: 2007920356.<br />
35. <strong>Tisan</strong>, S. Oniga, A. Buchman, C. Gavrincea, D. Mic, Mecanisme <strong>de</strong> conductie si recunoastere moleculara<br />
a senzorilor olfactivi semiconductori pe baza <strong>de</strong> SnO2, Buletinul Stiintific, Seria C, Volumul X, Fascicola<br />
<strong>Electronica</strong>, Electrotehnica, Automatizari, Simpozionul Stiintific National, Baia Mare, 8 – 9 Mai 2003,<br />
pp. 109 – 114. ISSN 1224‐3272<br />
36. <strong>Tisan</strong>, S. Oniga, A. Buchman, C. Gavrincea: Hardware/software co<strong>de</strong>sign of a pattern recognition<br />
system with on‐chip learning, Regional Conference on Embed<strong>de</strong>d and Ambient Systems, RCEAS 2007,<br />
Budapest, Hungary, November 25‐26, 2007, p 23‐24, ISBN 978‐963‐8431‐96‐7<br />
37. <strong>Tisan</strong>, S. Oniga, C. Gavrincea, A. Buchman, Hardware/Software Co‐<strong>de</strong>sign of a Self‐organized map with<br />
on‐chip learning, Proce<strong>de</strong>engs of the 11th International Conference on Optimization of Electrical and<br />
Electronic Equipment OPTIM 2008, 2008, Brasov, Romania, May 22‐23, p. 81‐86, IEEE Catalog Number<br />
08EX1996, ISBN 1‐4244‐1544‐6, Library of the Congress 2007905111, ISBN 978‐973‐131‐032‐9.<br />
38. <strong>Tisan</strong>, S. Oniga, C. Gavrincea, Hardware implementation of a MLP network with on‐chip learning,<br />
Proceedings of the 5th WSEAS International Conference on DATA NETWORKS, COMMUNICATIONS &<br />
COMPUTERS, Bucharest, Romania, October 16‐17, 2006, ISSN 1790‐5117, ISBN 960‐8457‐54‐8<br />
39. <strong>Tisan</strong>, S. Oniga, C. Gavrincea, Hardware Implementation of Various Neural Network with On‐Chip<br />
Learning, WSEAS TRANSACTIONS on SIGNAL PROCESSING, Issue 10, Volume 2, October 2006, ISSN<br />
1790‐5022, pag. 1357‐1364<br />
40. <strong>Tisan</strong>, S. Oniga, Current Status of Electronic Nose: the Sensing System, International Multidisciplinary<br />
Conference, 5th edition, Baia Mare, 23‐24 May 2003, Scientific Bulletin, serie C, Volume XVII, pp. 517‐<br />
522. ISSN: 1224‐3264<br />
41. Wilson D. R. , T. R. Martinez. The need for small learning rates on large problems. In Neural Networks,<br />
2001. Proceedings. IJCNN ’01. International Joint Conference on, volume 1, pages 115–119. IEEE, IEEE,<br />
July 2001.