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Chapter 22 Multichannel Audio Serial Port (McASP).pdf

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Functional Description www.ti.com<br />

<strong>22</strong>.3.10.5 Loopback Modes<br />

The <strong>McASP</strong> features a digital loopback mode (DLB) that allows testing of the <strong>McASP</strong> code in TDM mode<br />

with a single processor device. In loopback mode, output of the transmit serializers is connected internally<br />

to the input of the receive serializers. Therefore, you can check the receive data against the transmit data<br />

to ensure that the <strong>McASP</strong> settings are correct. Digital loopback mode applies to TDM mode only (2 to 32<br />

slots in a frame). It does not apply to DIT mode (XMOD = 180h) or burst mode (XMOD = 0).<br />

Figure <strong>22</strong>-33 shows the basic logical connection of the serializers in loopback mode. Two types of<br />

loopback connections are possible, selected by the ORD bit in the digital loopback control register<br />

(DLBCTL) as follows:<br />

• ORD = 0: Outputs of odd serializers are connected to inputs of even serializers. If this mode is<br />

selected, you should configure odd serializers to be transmitters and even serializers to be receivers.<br />

• ORD = 1: Outputs of even serializers are connected to inputs of odd serializers. If this mode is<br />

selected, you should configure even serializers to be transmitters and odd serializers to be receivers.<br />

Data can be externally visible at the I/O pin of the transmit serializer if the pin is configured as a <strong>McASP</strong><br />

output pin by setting the corresponding PFUNC bit to 0 and PDIR bit to 1.<br />

In loopback mode, the transmit clock and frame sync are used by both the transmit and receive sections<br />

of the <strong>McASP</strong>. The transmit and receive sections operate synchronously. This is achieved by setting the<br />

MODE bit of the DLBCTL register to 01b and the ASYNC bit of the ACLKXCTL register to 0.<br />

Figure <strong>22</strong>-33. <strong>Serial</strong>izers in Loopback Mode<br />

<strong>Serial</strong>izer 0<br />

Receive<br />

<strong>Serial</strong>izer 1 Transmit<br />

<strong>Serial</strong>izer 2<br />

<strong>Serial</strong>izer 3<br />

Receive<br />

Transmit<br />

<strong>Serial</strong>izer 0 Transmit<br />

<strong>Serial</strong>izer 1<br />

<strong>Serial</strong>izer 2<br />

<strong>Serial</strong>izer 3<br />

Receive<br />

Transmit<br />

Receive<br />

<strong>Serial</strong>izer 4 Receive <strong>Serial</strong>izer 4 Transmit<br />

<strong>Serial</strong>izer 5 Transmit <strong>Serial</strong>izer 5 Receive<br />

<strong>Serial</strong>izer n−1<br />

<strong>Serial</strong>izer n<br />

(a) DLBEN = 1 (loopback enabled)<br />

and<br />

ORD = 0 (even receive,<br />

odd transmit)<br />

Receive <strong>Serial</strong>izer n−1<br />

Transmit <strong>Serial</strong>izer n<br />

Transmit<br />

Receive<br />

(b) DLBEN = 1 (loopback enabled)<br />

and<br />

ORD = 1 (odd receive,<br />

even transmit)<br />

3972 <strong>Multichannel</strong> <strong>Audio</strong> <strong>Serial</strong> <strong>Port</strong> (<strong>McASP</strong>) SPRUH73E–October 2011–Revised May 2012<br />

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Copyright © 2011–2012, Texas Instruments Incorporated

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