Vivado Design Suite Tutorial - Xilinx
Vivado Design Suite Tutorial - Xilinx
Vivado Design Suite Tutorial - Xilinx
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Summary<br />
command to the end of the timing.xdc. This file was set as the target when you saved the<br />
create_clock command earlier.<br />
8. Exit the <strong>Vivado</strong> IDE, or keep it open and continue to Lab #2: Using the Tcl Console.<br />
Summary<br />
You have learned how to add timing constraints to a design using a constraint wizard and the<br />
Constraints spreadsheet from the Timing Constraints window in the <strong>Vivado</strong> IDE.<br />
You can also use the Tcl Console to interactively add and apply constraints to the design as Tcl<br />
commands.<br />
Still another approach is to work directly with the XDC file to create design constraints.<br />
Using Constraints www.xilinx.com 18<br />
UG945 (v2012.2) August 8, 2012