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P4080 PCIe Adapter SDK User Guide Production Release

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Freescale Semiconductor<br />

3.2 Run-to-Completion USDPAA Application Execution Model<br />

Both the stand-alone host mode and the EP mode support a run-to-completion model of execution of the<br />

USDPAA applications which is detailed in this section.<br />

The full run-to-completion use case is defined by the following characteristics:<br />

• No more than one USDPAA thread is used per core. Not all cores need have a USDPAA thread,<br />

however.<br />

• Cores hosting USDPAA threads may be configured to run nothing in user space other than that<br />

core’s USDPAA thread. For example, the kernel parameter “isolcpus” can be used. This parameter<br />

prevents the Linux scheduler from running a thread or process on an isolated core unless the<br />

scheduling mask of that thread or process is explicitly set to include the isolated core. USDPAA<br />

does not require isolation architecturally, but it may be used if the system goal is to, at least mostly,<br />

dedicate a core to running a single thread. Also, polling (see below) is wasteful if others threads<br />

are to run on the same core as the USDPAA thread.<br />

• In run-to-completion, USDPAA threads poll their portals. Polling generally implies that the<br />

USDPAA threads will always be running or ready to run. It would be unusual to have other threads<br />

scheduled on the same core.<br />

• Often, one thinks of the USDPAA threads as “workers” able to process any form of “work”<br />

delivered via QMan messages. In this model, the QMan scheduler can be used as a general “work”<br />

scheduler rather than relying on the Linux scheduler for this purpose.<br />

Figure 3 illustrates the use of QMan in multi-step processing of a network frame:<br />

• Frame arrives at FMan.<br />

• Frame is processed by a core and sent to SEC.<br />

• SEC further processes the frame and returns it to a core, possibly a different core.<br />

• Core sends frame to FMan for egress.<br />

The numbers in the figure show the steps in the progression of a frame through the example.<br />

The QMan scheduler determines the priority of processing at each step.<br />

Specific types of “work” are carried by specific frame queues, the heads of which reside in specific QMan<br />

channel work queues. QMan inter-class scheduling operates at the work queue level and determines the<br />

order in which the messages that carry the “work” are delivered.<br />

Work queues within QMan pool channels can be associated with classes of “work.” Portals’ QMan<br />

dequeue masks determine the set of channels from which the portal will dequeue. Since the portals are<br />

affine to cores, this determines which cores are configured to process which classes of work. Even the<br />

number of cores can be adjusted by changing the masks.<br />

© Freescale Semiconductor, Inc., 2011. All rights reserved.<br />

Freescale Confidential Proprietary Page 10

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