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P4080 PCIe Adapter SDK User Guide Production Release

P4080 PCIe Adapter SDK User Guide Production Release

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Freescale Semiconductor<br />

File system (used in RAM disk) that contains the needed user space files including<br />

USDPAA<br />

example application binaries. Linux must be booted using this file system.<br />

All six of the files listed above are needed to run USDPAA on the card. The first three must be<br />

programmed into the NOR flash. The last three may be programmed into the NOR flash, but also<br />

may be loaded into RAM by u-boot using the tftp protocol.<br />

U-boot is also capable of loading files into RAM via tftp and then programming them into the<br />

NOR flash. In all cases, you must have access to a tftp server, ideally on your Linux development<br />

host.<br />

Copy the six files listed above to a directory from which they can be accessed via your tftp server.<br />

U-boot on the <strong>P4080</strong> PCIE <strong>Adapter</strong> must use tftp to access them. Details of installing and<br />

configuring a tftp server on your development host are specific to your host Linux distribution.<br />

6.6 Programming <strong>P4080</strong> PCIE <strong>Adapter</strong> NOR Flash Bank 0<br />

The <strong>P4080</strong> PCIE <strong>Adapter</strong> has a feature that uses address swizzling to make it appear that the<br />

NOR flash is divided into multiple parts-- this document will assume two. The parts are called<br />

“bank 0” and “bank 4”.<br />

When you power-on or reset, u-boot will boot from bank 0. U-boot in bank 0 can program<br />

images into bank 4. Then, you can enter “n710_reset altbank” from the bank 0 u-boot prompt<br />

to boot into bank 4.<br />

It is recommended to leave the bank 0 images alone and simply use them to program images into<br />

bank 4. This is to ensure that you always have working images in bank 0. Programming Bank 0<br />

should only be used, once the images have been validated in bank 4.<br />

U-boot Boot Text<br />

Below is a reference text of u-boot bootup<br />

U-Boot MPS N710 2010.12 (Sep 20 2011 - 13:24:26)<br />

CPU0: <strong>P4080</strong>E, Version: 2.0, (0x82080020)<br />

Core: E500MC, Version: 2.0, (0x80230020)<br />

Clock Configuration:<br />

CPU0:1333.333 MHz, CPU1:1333.333 MHz, CPU2:1333.333 MHz, CPU3:1333.333 M<br />

CPU4:1333.333 MHz, CPU5:1333.333 MHz, CPU6:1333.333 MHz, CPU7:1333.333 M<br />

CCB:666.667 MHz,<br />

© Freescale Semiconductor, Inc., 2011. All rights reserved.<br />

Freescale Confidential Proprietary Page 36

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