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P4080 PCIe Adapter SDK User Guide Production Release

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Freescale Semiconductor<br />

write memory directly using DMA. Buffers used for peripherals’ DMA must be allocated from memory<br />

with special properties:<br />

• The memory must be physically contiguous since the peripheral does not access memory via the<br />

core’s MMU (or any page-mode I/O MMU).<br />

• The memory must be addressable by the peripheral.<br />

• The memory must not be swapped out by Linux while the device is accessing it.<br />

• For user space drivers, there must be an efficient mechanism to convert the physical addresses used<br />

by the peripheral hardware to and from the effective addresses used in a user space process or<br />

thread’s address space.<br />

• For BMan and DPAA usage, it is often convenient for software to allocate memory from physically<br />

contiguous regions that are quite large.<br />

• It is desirable to use the Power core’s TLB1 mechanism to map large physically contiguous<br />

memory regions of this sort. This increases performance by reducing the number of MMU-related<br />

interrupts that must be processed. A single TLB0 entry can map only a single 4K page. A single<br />

TLB1 entry, in contrast, can map a large (but variable-sized) page. One TLB1 entry can do the work<br />

of many TLB0 entries in circumstances such as this one.<br />

Memory that meets the criteria above is called DMA memory. Drivers for all DMA-capable devices must<br />

use DMA memory for buffers. This is true for both conventional in-kernel drivers and user space drivers.<br />

It is a hardware implication of peripherals’ relationships to cores and MMUs.<br />

© Freescale Semiconductor, Inc., 2011. All rights reserved.<br />

Freescale Confidential Proprietary Page 24

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