HyperLynx – High Speed PCB Design Workshop - RTP Designers ...
HyperLynx – High Speed PCB Design Workshop - RTP Designers ...
HyperLynx – High Speed PCB Design Workshop - RTP Designers ...
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DDR/DDR2 <strong>Design</strong> Challenges<br />
Power Plane Stability<br />
� Vref and VDD Stability<br />
— SSO can cause fluctuations in<br />
Vref due to inadequate decoupling<br />
� Causes the Vref level to shift which changes the Vih and Vil<br />
switching thresholds<br />
Memory<br />
Controller<br />
<strong>HyperLynx</strong> <strong>–</strong> <strong>High</strong> <strong>Speed</strong> <strong>PCB</strong> <strong>Design</strong> <strong>Workshop</strong><br />
DIMM Slot 1<br />
VDD VTT<br />
DIMM Slot 2<br />
33<br />
VTT Pull-up Resistors