Field Trial of Optical Fibre Cable-TV System Optical Fibre System for ...

Digital
input signals
Digital
output signals
Picture
Sync word
Channellselection
H
Sync
algorithm
Picture
Data
Data
Clock
Transmission
equipment
Data
Clock
Signal
converter
_^
Dalj
Souna
'Sync
Control
Frame multiplexer
Frame handler
Frame
demultiplexer
Fig. 10
Frame multiplexer and frame demultiplexer tor
ZAV 280/4
Fig. 11
State diagram for the sync algorithm used in the
frame demultiplexers
Wrong sync word
Right sync word
Sync word found
Audio and data are evenly distributed in
the columns, so that throughout there
are six audio bits and 1 data bit vertically.
Frame handling
On the receiver side of the system, synchronization
of the data stream and
identification of the frame structure
must be effected to permit demultiplexing.
All of this is done in the frame handler,
fig. 10.
Frame synchronization is done with an
algorithm of the same type as the one
used in line systems and as recommended
by CCITT, fig. 11. The algorithm
implies that the synchronized basic
state is not released until an error in the
frame alignment word has occurred four
times. Only then is the synchronization
released and a search is started for a
new frame alignment word in the data
stream. If one is found, the stream is
locked again but a return to the synchronized
basic state is not made until it
has been confirmed twice again that the
frame alignment word is the correct one.
An algorithm of this type ensures very
stable synchronization. In practice it
means that, apart from the start-up procedure
when the equipment is switched
on, the system never loses its synchronization
as long as the equipment functions.
The frame handler generates al
the control signals which identify the
frame structure and indicate the timing
to the decoder units and demultiplexoi
The frame handler also controls the
channel selection in the optical receiver
so that the receiver changes channel
(see section Receiver) if frame synchronization
has not been obtained withina
given time.
Finally the data stream is descrambleo
with a reset scrambler to recreate the
correct data stream as it was before the
corresponding scrambling in the multiplexer.
No scrambling takes placeon
the frame alignment word (12 bits).
The object of the scrambling together
with the rearrangement of bits in the
frame structure is to ensure a balanced
data stream without long sequences of
ones or zeroes.
The frame handler consists of a fou'
layer printed circuit board and is equipped
with high-speed logic of ECLtype
MUX/DEMUX
The multiplexer and demultiplexer, respectively,
combine and separate the
video/audio channels and data.
The multiplexer assembles the fra" 16
structure from data and timing information
and scrambles the serial #
stream except the frame alignme ṟ
word, in a reset scrambler.
To take up time differences which a f)
when video data are placed in the f^in
bursts (it takes time to insert a"»';
data and frame alignment bits) '
(First In First Out) buffers are usedthe
inputs to the multiplexer.