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Configurable Modular <strong>Test</strong>er (CMT)<br />
and Open Architecture<br />
• Common tester shell with replaceable boards<br />
– True parallel test without any penalty<br />
• Scalable system from commodity through high end<br />
– Adaptable to changing production demands (i.e. CPU, chipsets,<br />
communication products, …)<br />
– Upgradeable as new test technology is developed<br />
Pattern<br />
Gen<br />
Timing<br />
Gen<br />
Pattern<br />
Gen<br />
Timing<br />
Gen<br />
Pattern<br />
Gen<br />
Timing<br />
Gen<br />
Pattern<br />
Gen<br />
Timing<br />
Gen<br />
Pattern<br />
Gen<br />
Timing<br />
Gen<br />
Pattern<br />
Select<br />
Timing<br />
Format<br />
Pattern<br />
Select<br />
Timing<br />
Format<br />
Pattern<br />
Select<br />
Timing<br />
Format<br />
Pattern<br />
Select<br />
Timing<br />
Format<br />
Pattern<br />
Select<br />
Timing<br />
Format<br />
Power<br />
PC<br />
Cooling<br />
Memory:<br />
Scan, Functional<br />
Fail Capture<br />
Clock<br />
Sync<br />
Power<br />
&<br />
Control<br />
Memory:<br />
Scan, Functional<br />
Fail Capture<br />
Clock<br />
Sync<br />
Power<br />
&<br />
Control<br />
Control,Sync,<br />
Data<br />
Memory:<br />
Scan, Functional<br />
Fail Capture<br />
Clock<br />
Sync<br />
Power<br />
&<br />
Control<br />
Memory:<br />
Scan, Functional<br />
Fail Capture<br />
Clock<br />
Sync<br />
Power<br />
&<br />
Control<br />
System BUS<br />
……..<br />
Memory:<br />
Scan, Functional<br />
Fail Capture<br />
Clock<br />
Sync<br />
Power<br />
&<br />
Control<br />
June 3-6, 3<br />
2007 IEEE SW <strong>Test</strong> Workshop 8
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