10Gbps Optical Receiver and VCSEL Driver in 0.13um CMOS ...

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low-noise characteristics. However, deep-submicron CMOS technologies become more attractive due to its low cost and high integration capacity. And almost optical receivers and transmitters over 10-Gb/s operation exploited passive inductor to enhance the bandwidth, while the area of chipset became large [1]-[3]. In this thesis, we realize 10-Gb/s CMOS optical receiver and VCSEL driver without passive inductor. Optical receiver includes transimpedance amplifier (TIA) and limiting amplifier (LA). The advanced common-gate (ACG) stage is exploited as the input configuration of TIA. The ACG input configuration can effectively isolate the large photodiode capacitance from the bandwidth determination, as providing virtual-ground input impedance. And limiting amplifier achieves wide bandwidth using the combination of active feedback and negative impedance compensation. We estimate p-i-n photodiode has 0.7-A/W responsivity and 0.25-pF parasitic capacitance. An optical receiver achieves 10-Gb/s operations with 6.6-GHz 3-dB bandwidth for 0.25-pF input parasitic capacitance, 96-dBΩ transimpedance gain, and 22-pA/sqrt(Hz) average inputreferred noise current density that corresponds to -16.5-dBm sensitivity for 10 -12 BER. The whole receiver chip occupies the area of 1.8 × 1.35 mm 2 , and the power dissipation is 54-mW from a single 1.2-V ix
supply. VCSEL driver consists of LVDS/CML compatible pre amplifier, and main driver. The designed transmitter drives VCSEL array, operating up to 10-Gb/s with bias control (5~20-mA) and modulation control (5~20-mApp) to obtain constant and reliable optical output power. The whole transmitter chip occupies the area of 2.05 × 0.83 mm 2 , and dissipates 50-mW from a single 1.8-V supply. Keywords: Optical Receiver, VCSEL Driver, Transimpedance Amplifier, Limiting Amplifier, Active Feedback, CMOS x
Page 1 and 2: 10-Gb/s Optical Receiver and VCSEL
Page 4 and 5: Contents Figure Index______________
Page 6 and 7: Figure 2.12 (a) Common-Gate and (b)
Page 8 and 9: Table Index Table 1. Measurement Re
Page 12 and 13: Chapter Ⅰ Introduction 1.1 Optica
Page 14 and 15: An optical communication system gen
Page 16 and 17: Chapter Ⅱ 10-Gb/s Optical Receive
Page 18 and 19: performance of receiver. The photod
Page 20 and 21: Photodiode C PD I in TIA + V out -
Page 22 and 23: sensitivity of the whole receiver.
Page 24 and 25: and feedback TIAs. The goal when de
Page 26 and 27: performance of this device comes at
Page 28 and 29: + V in - + + LA - - + V out - Figur
Page 30 and 31: 2.2 10-Gb/s Optical Receiver Analog
Page 32 and 33: inversely proportional to BW 3-dB .
Page 34 and 35: common-gate configuration. For exam
Page 36 and 37: 2.14 shows schematic of DC offset c
Page 38 and 39: ω 3− dB GBW Our work Figure 2.16
Page 40 and 41: in Fig 2.20. Optical receiver maint
Page 42 and 43: 3.1 Background 3.1.1 VCSEL CHAPTER
Page 44 and 45: electrical and optical dBs. As indi
Page 46 and 47: 3.2 Design of VCSEL Driver 3.2.1 Pr
Page 48 and 49: 3.3 Simulation Results Figure 3.6 E
Page 50 and 51: (b) Figure 4.1 Microphotographs of
Page 52 and 53: MM410C (optical power monitor and a
Page 54 and 55: transimpedance amplifiers and limit
Page 56 and 57: (d) Figure 4.4 Eye Patterns of the
Page 58 and 59: CHAPTER Ⅴ Conclusion In this diss
Page 60 and 61:
Bibliography [1] Wei-Zen Chen and D
Page 62 and 63:
[12] Behnam Analui and Ali Hajimiri
Page 64 and 65:
국문요약 CMOS 0.13-μm 공정
Page 66:
다. 본 연구에서 설계된 광
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10Gbps Optical Receiver and VCSEL Driver in 0.13um CMOS ...

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