10Gbps Optical Receiver and VCSEL Driver in 0.13um CMOS ...

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ω 3− dB GBW Our work Figure 2.16 Normalized bandwidth versus N for A tot = 40-dB Fig 2.16 illustrates normalized bandwidth as a function of the number of stage of LA for desired total voltage gain, 40-dB. The maximum bandwidth appears at N=10, approximately. However, as N goes from 5 to 10, the bandwidth increases by less than 15%. Furthermore, with N=10, the gain per stage is small, making the noise contributed by all of the stages significant. For these reasons, we set the number of LA gain stage to four [15]. Figure 2.17 Open-Drain Output Buffer 27
As shown in Fig 2.17, output buffer employing the open-drain differential pair configuration drive the off-chip 50-Ω terminations and help the measurements of the output voltage and eye pattern. And tail current value determine the output voltage swing, ( V DD -50·I tail ). We set the differential output swing to 600-mV for CDR to operate properly. 2.3 Post-Layout Simulation Results Post-layout simulations were conducted for the designed optical receiver by using the model parameter of a standard 0.13-μm CMOS technology. The total parasitic capacitance at the input is estimated ~0.3-pF including photodiode parasitic capacitance (0.25-pF), bonding pad capacitance (25-fF), and the gate capacitance of input transistor. Fig 2.18 illustrates frequency response of optical receiver, exhibiting 6.6-GHz bandwidth for 10-Gb/s operation and 96-dBΩ transimpedance gain. The bandwidth is optimized to 60~70 % of bit rate, considering tradeoff between noise and ISI. Fig 2.19 shows Input-Referred Noise Current Density. The average Input-Referred Noise Current Density is ~22-pA/sqrt(Hz), which corresponds to input sensitivity of -16.5-dBm for 10 -12 BER and 0.7- A/W responsivity. The eye patterns according to received optical power are presented 28
Page 1 and 2: 10-Gb/s Optical Receiver and VCSEL
Page 4 and 5: Contents Figure Index______________
Page 6 and 7: Figure 2.12 (a) Common-Gate and (b)
Page 8 and 9: Table Index Table 1. Measurement Re
Page 10 and 11: low-noise characteristics. However,
Page 12 and 13: Chapter Ⅰ Introduction 1.1 Optica
Page 14 and 15: An optical communication system gen
Page 16 and 17: Chapter Ⅱ 10-Gb/s Optical Receive
Page 18 and 19: performance of receiver. The photod
Page 20 and 21: Photodiode C PD I in TIA + V out -
Page 22 and 23: sensitivity of the whole receiver.
Page 24 and 25: and feedback TIAs. The goal when de
Page 26 and 27: performance of this device comes at
Page 28 and 29: + V in - + + LA - - + V out - Figur
Page 30 and 31: 2.2 10-Gb/s Optical Receiver Analog
Page 32 and 33: inversely proportional to BW 3-dB .
Page 34 and 35: common-gate configuration. For exam
Page 36 and 37: 2.14 shows schematic of DC offset c
Page 40 and 41: in Fig 2.20. Optical receiver maint
Page 42 and 43: 3.1 Background 3.1.1 VCSEL CHAPTER
Page 44 and 45: electrical and optical dBs. As indi
Page 46 and 47: 3.2 Design of VCSEL Driver 3.2.1 Pr
Page 48 and 49: 3.3 Simulation Results Figure 3.6 E
Page 50 and 51: (b) Figure 4.1 Microphotographs of
Page 52 and 53: MM410C (optical power monitor and a
Page 54 and 55: transimpedance amplifiers and limit
Page 56 and 57: (d) Figure 4.4 Eye Patterns of the
Page 58 and 59: CHAPTER Ⅴ Conclusion In this diss
Page 60 and 61: Bibliography [1] Wei-Zen Chen and D
Page 62 and 63: [12] Behnam Analui and Ali Hajimiri
Page 64 and 65: 국문요약 CMOS 0.13-μm 공정
Page 66: 다. 본 연구에서 설계된 광

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