10Gbps Optical Receiver and VCSEL Driver in 0.13um CMOS ...

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Chapter Ⅱ 10-Gb/s Optical Receiver Design 2.1 Background The basic optical receiver consists of a photodiode and a transimpedance amplifier. The photodiode is a square law device, which means the detected electrical current depends on the power of the incident optical signal. TIA amplifies this electrical current with sufficient bandwidth, converting it to a voltage, while adding as little noise as possible. Generally, the TIA output signal is still not large enough to reach detectable logic levels (approximately 500-mVpp) so additional amplification is required in the form of a limiting amplifier (LA). The input signal of LA is amplified until it is saturated at the amplifier voltage rails. This has the effect of producing a reasonably constant output voltage swing for a wide range of input voltage levels. If the LA is DC coupled to the TIA, DC offset compensation is required to prevent the LA from saturating at one rail. The TIA and LA make up what is generally called the analog front-end of the optical receiver. After the received signal has been boosted to detectable logic levels, 5
a decision circuit is used to remove the noise from the received signal. The decision circuit is timed by a clock recovery circuit which extracts a clock signal from the received data. It is important that the clock driving the retimer (flip-flop) has a well-defined phase relationship with the received data such that the signal is sampled at the optimum point during the bit period. Finally, the signal can be multiplexed down to multiple lower bit rate signals using a de-multiplexer (DEMUX). A block diagram of this typical optical receiver is shown in Fig 2.1 [7]. Figure 2.1 Block Diagram of Optical Receiver 2.1.1 Photodiode The first element in an optical receiver is the photodiode. It is important to understand the main characteristics of this device, namely responsivity and noise, in order to be able to discuss and calculate the 6
Page 1 and 2: 10-Gb/s Optical Receiver and VCSEL
Page 4 and 5: Contents Figure Index______________
Page 6 and 7: Figure 2.12 (a) Common-Gate and (b)
Page 8 and 9: Table Index Table 1. Measurement Re
Page 10 and 11: low-noise characteristics. However,
Page 12 and 13: Chapter Ⅰ Introduction 1.1 Optica
Page 14 and 15: An optical communication system gen
Page 18 and 19: performance of receiver. The photod
Page 20 and 21: Photodiode C PD I in TIA + V out -
Page 22 and 23: sensitivity of the whole receiver.
Page 24 and 25: and feedback TIAs. The goal when de
Page 26 and 27: performance of this device comes at
Page 28 and 29: + V in - + + LA - - + V out - Figur
Page 30 and 31: 2.2 10-Gb/s Optical Receiver Analog
Page 32 and 33: inversely proportional to BW 3-dB .
Page 34 and 35: common-gate configuration. For exam
Page 36 and 37: 2.14 shows schematic of DC offset c
Page 38 and 39: ω 3− dB GBW Our work Figure 2.16
Page 40 and 41: in Fig 2.20. Optical receiver maint
Page 42 and 43: 3.1 Background 3.1.1 VCSEL CHAPTER
Page 44 and 45: electrical and optical dBs. As indi
Page 46 and 47: 3.2 Design of VCSEL Driver 3.2.1 Pr
Page 48 and 49: 3.3 Simulation Results Figure 3.6 E
Page 50 and 51: (b) Figure 4.1 Microphotographs of
Page 52 and 53: MM410C (optical power monitor and a
Page 54 and 55: transimpedance amplifiers and limit
Page 56 and 57: (d) Figure 4.4 Eye Patterns of the
Page 58 and 59: CHAPTER Ⅴ Conclusion In this diss
Page 60 and 61: Bibliography [1] Wei-Zen Chen and D
Page 62 and 63: [12] Behnam Analui and Ali Hajimiri
Page 64 and 65: 국문요약 CMOS 0.13-μm 공정
Page 66:
다. 본 연구에서 설계된 광
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