Military Embedded Systems Summer 2006

Hardware
Reconfigurable FPGAs
Board vendor FPGA toolkits make
or break your project
By Mark Littlefield
FPGAs dramatically accelerate DSP
designs while bringing reconfigurability
to the battlefield. But to wring out
performance, ease-of-use, and overall
program benefits, a design toolkit is
needed. Better choose wisely.
Increasingly, the military community
is recognizing that there is a class
of signal processing that is now best
accomplished via a reconfigurable computing
implementation instead of the
traditional method of software running
on microprocessors. Modern Field Programmable
Gate Arrays (FPGAs) have
reached a level of density, speed, and cost
such that system designers can now often
achieve a tenfold reduction in size and
power when compared with the traditional
microprocessor-based approach. The
power of FPGAs stems from the
opportunity to parallelize operations that
a microprocessor must do sequentially.
For many signal processing designers,
the question is not whether the use of
FPGAs will result in higher performance
– performance/power/cost – but whether
the R&D investment will pay off. The
simple fact is that developing signal
processing functions in FPGAs has high
technical risk, which can result in cost
and schedule overruns.
When selecting a COTS board level
product, a system integrator should
be aware that the board vendor FPGA
supporting toolkit will play a large role
in reducing (or not) this technical risk.
Herein, we will acquaint the reader with
the nature of such tools and their effect on
the cost of developing an FPGA compute
solution.
What is an FPGA toolkit?
In our context, an FPGA toolkit is the
collection of supporting IP (VHDL
designs) and other software components
that are offered for use by the vendor of
a board level product. We are not talking
about the synthesis and simulation tools
that are the domain of the FPGA silicon
vendors and other tool specialists.
The components of an FPGA board
toolkit fall into four categories:
• IP designs to control hardware
features, for example, an SDRAM
controller
• IP infrastructure to connect IP blocks
together
• Software for system services, data
movement, and general system
integration
• Simulation and test
To appreciate the key attributes of these
toolkit components, consider the Curtiss-
Wright CHAMP-FX, an FPGA processing
board designed for military signal
processing applications. The CHAMP-
FX, illustrated in Figure 1, integrates the
Xilinx Virtex-II Pro FPGAs (VP70/100)
with local memories, PCI interfaces, and
high-speed serial interfaces.
The combination of DDR SDRAM for
bulk storage and DDR SRAM for fast,
nonsequential storage of algorithm data
allows flexibility in mapping algorithms to
this architecture. In a typical application,
data may first flow into SDRAM with
intermediate storage in SRAM for
algorithm processing with results output
via the PCIbus to StarFabric or an
alternate interface provided by a PMC
module. In such dataflow architectures,
the performance and ease of use of the
memory controllers can dictate the overall
performance of the application.
Robust IP blocks are critical
Implementing a memory controller provides
an example of the criticality of the
design kit to the success of a project. While
it is possible to obtain free designs for an
SDRAM controller from FPGA vendors,
be advised that these are often limitedfunction
reference designs. Experience
has shown that it takes many man-months
of experienced FPGA designer time to
implement a high-performance, reliable
SDRAM controller for FPGA-based
hardware. The challenges that emerged
– not unexpected – emanate from classic
FPGA design issues. Examples of some
of these design issues follow:
During the read cycle of a DDR SDRAM,
the FPGA sends out a clock to the
SDRAM and waits two cycles for a
four-word burst to return. The challenge
is in clocking the data back from the
SDRAM. There is skew between the
12 / SUMMER 2006 Military EMBEDDED SYSTEMS