Military Embedded Systems Summer 2006

Hardware
Reconfigurable FPGAs
Local Link is a packet-oriented interface
for streaming data applications. In a DSP
application, it is common for sensor data
– digitized RF, electro-optical, and sonar
– to arrive in nonaddressed packet form.
The RocketIO controllers (3.125 Gbps)
are supported with Local Link interfaces
and DMA controllers to direct streaming
data into memory-addressed locations.
To simplify the interconnection of user IP
with the toolkit IP modules, the company
has developed an IPIC switch, which
allows modules with IPIC or Local Link
interfaces to connect together seamlessly
(see Figure 3). Multiple IPIC switches
can be instantiated in the design, allowing
users flexibility in choosing the best
solution.
Last but not least is the added challenge
presented by the wide temperature ranges
encountered in military applications.
The typical environmental requirement
of -40 ºC to +85 ºC translates to an even
wider range of -40 ºC to +110 ºC for the
silicon. The design tools provide estimates
of the timing effects over temperature,
but only costly environment testing can
verify the real effects, which will rarely
be exactly as predicted. The design kit
IP, if prequalified to this temperature,
removes this as a risk item.
Figure 2
14 / SUMMER 2006 Military EMBEDDED SYSTEMS
Interconnecting IP blocks
It is desirable for IP controllers and
functional blocks provided as part of a
toolkit to adhere to a consistent interface
standard. Common interfaces ease IP
block integration. We have adopted two
interface conventions defined by Xilinx,
IP Interconnect (IPIC) and Local Link.
Memory mapped interfaces adhere to
the IPIC standard, allowing an IP block
to read or write to a memory address
or register. SDRAM, SRAM, and the
PCIbus are provided with IPIC interfaces.
Simulation: Don’t take it
for granted
FPGA signal processor designs are
complex and, unlike software, are not
easily instrumented for testing purposes.
(There is no printf()!) The rule of
thumb for a complex project is that
simulation is 50 percent of the effort. It
is fairly obvious that the FPGA vendor
simulation tools can simulate the logic
within the FPGA, but unless models are
provided for external devices connected
to the FPGA, the simulation cannot
include interaction with these devices. A
good FPGA toolkit will offer a test-bench
environment that includes models of all
the external interfaces, the capability to
initialize memory interfaces and pass data
from PCI and RocketIO into the FPGA
and check memory, and the capability
to test PCI or RocketIO data against
expected data previously stored in files.
The toolkit should provide a scripting
language to facilitate the simulation of
the design with test data and the capture
of output data into files for comparison
against expected results.
Unless a good simulation environment is
part of the toolkit, the customer will be
faced with a great deal of unplanned effort
to establish a test environment. Figure
4 depicts the simulation models that are
supplied with the CHAMP-FX design kit,
and the logical points where data can be
input or output from the simulation.