ARM PrimeCell Synchronous Serial Port (PL022) Technical ...

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ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual Copyright © 2000-2001, 2009, 2011. All rights reserved. Release Information Change history Date Issue Confidentiality Change 6 September 2000 A Non-Confidential First release 19 March 2001 B Non-Confidential Second release 15 June 2001 C Non-Confidential Third release 31 July 2001 D Non-Confidential Fourth release 30 January 2009 E Non-Confidential Unrestricted Access Fifth release 01 November 2011 F Non-Confidential Unrestricted Access Sixth release 04 November 2011 G Non-Confidential Unrestricted Access Seventh release Proprietary Notice Words and logos marked with ® or are registered trademarks or trademarks owned by ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder. The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded. This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product. Confidentiality Status This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to. Product Status The information in this document is final, that is for a developed product. Web Address http://www.arm.com ARM DDI 0194G Copyright © 2000-2001, 2009, 2011. All rights reserved. ii ID110411 Non-Confidential
Contents ARM PrimeCell Synchronous Serial Port (PL022) Technical Reference Manual Preface About this book ........................................................................................................... vi Feedback ..................................................................................................................... x Chapter 1 Chapter 2 Chapter 3 Chapter 4 Introduction 1.1 About the ARM PrimeCell SSP (PL022) .................................................................. 1-2 1.2 Product revisions ..................................................................................................... 1-5 Functional Overview 2.1 PrimeCell SSP overview .......................................................................................... 2-2 2.2 PrimeCell SSP functional description ...................................................................... 2-3 2.3 PrimeCell SSP operation ......................................................................................... 2-6 Programmer’s Model 3.1 About the programmer’s model ............................................................................... 3-2 3.2 Summary of PrimeCell SSP registers ...................................................................... 3-3 3.3 Register descriptions ............................................................................................... 3-4 3.4 Interrupts ................................................................................................................ 3-20 Programmer’s Model for Test 4.1 PrimeCell SSP test harness overview ..................................................................... 4-2 4.2 Scan testing ............................................................................................................. 4-3 4.3 Test registers ........................................................................................................... 4-4 4.4 Integration testing of block inputs ............................................................................ 4-8 4.5 Integration testing of block outputs ........................................................................ 4-10 4.6 Integration test summary ....................................................................................... 4-13 ARM DDI 0194G Copyright © 2000-2001, 2009, 2011. All rights reserved. iii ID110411 Non-Confidential
Page 1: ® ARM PrimeCell Synchronous Serial
Page 5 and 6: Preface This preface introduces the
Page 7 and 8: Preface • Signals. Typographical
Page 9 and 10: Preface Additional reading This sec
Page 11 and 12: Chapter 1 Introduction This chapter
Page 13 and 14: Introduction • Internal loopback
Page 15 and 16: Introduction 1.2 Product revisions
Page 17 and 18: Functional Overview 2.1 PrimeCell S
Page 19 and 20: Functional Overview 2.2.1 AMBA APB
Page 21 and 22: Functional Overview 2.3 PrimeCell S
Page 23 and 24: Functional Overview The Serial Cloc
Page 25 and 26: Functional Overview SSPCLKOUT/ SSPC
Page 27 and 28: Functional Overview SSPCLKOUT/ SSPC
Page 29 and 30: Functional Overview However, in the
Page 31 and 32: Functional Overview Note The off-ch
Page 33 and 34: Functional Overview PL022 configure
Page 35 and 36: Functional Overview Table 2-1 shows
Page 37 and 38: Programmer’s Model 3.1 About the
Page 39 and 40: Programmer’s Model 3.3 Register d
Page 41 and 42: Programmer’s Model Table 3-3 show
Page 43 and 44: Programmer’s Model Table 3-5 show
Page 45 and 46: Programmer’s Model Table 3-7 SSPI
Page 47 and 48: Programmer’s Model 15 2 1 0 Reser
Page 49 and 50: Programmer’s Model SSPPeriphID0 r
Page 51 and 52: Programmer’s Model 15 8 7 0 Reser
Page 53 and 54:
Programmer’s Model SSPPCellID2 re
Page 55 and 56:
Programmer’s Model 3.4 Interrupts
Page 57 and 58:
Chapter 4 Programmer’s Model for
Page 59 and 60:
Programmer’s Model for Test 4.2 S
Page 61 and 62:
Programmer’s Model for Test 4.3.2
Page 63 and 64:
Programmer’s Model for Test Table
Page 65 and 66:
Programmer’s Model for Test conne
Page 67 and 68:
Programmer’s Model for Test 4.5.2
Page 69 and 70:
Programmer’s Model for Test 4.6 I
Page 71 and 72:
Appendix A Signal Descriptions This
Page 73 and 74:
Signal Descriptions A.2 On-chip sig
Page 75 and 76:
Appendix B Revisions This appendix
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