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KS5112<br />

CMOS DIGITAL INTEGRATED CIRCUIT<br />

APPLICATION<br />

• The voltage doubler circuit is formed by connecting O.OS"F to O.1~ capacitor from 'CAP' PAD to '1KO' PAD and from ·VDD2'<br />

PAD to 'VSS' PAD.<br />

• Oscillator circuit is formed by connecting crystal from '01' PAD to '00' PAD.<br />

• The circuit substrate is electrically connected to Vss, the most negative voltage. The preferred assembly method<br />

is to connect die area to Vss using a conductive die attach.<br />

• The watch can operate with 1.SV silver oxide battery and user should connect 'VDD' PAD to 1.SV, VSS to OV.<br />

TESTING<br />

• T1, T2 and T3 PAD are provided for testing. In normal operation they should be kept open.<br />

• Three test inputs and two switches are pulled down by internal resistors.<br />

LCD FORMAT<br />

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0<br />

0 ill ill<br />

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0<br />

~ ;Z ~<br />

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(J III III<br />

~<br />

~ B<br />

!!i!<br />

~ ~<br />

w<br />

III<br />

u '" ~<br />

c8SAMSUNG 53

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