elektronická verzia publikácie - FIIT STU

Annual report 2011 21describe how effective is executing on graphics processing units insteadof central processing units. These evaluations provide informationabout which representation of genetic program is better suitedfor execution on graphics processing units.Student name: Martin LabajThesis title: Recommendation and Collaboration Based on Implicit FeedbackSupervisor: Mária Bieliková, ProfessorDefended on: May 2011Degree program: Software EngineeringAnnotation: In the field of e-learning and open web, the identification of difficultand/or interesting parts of learning text can be useful feature for taskslike rewriting, showing where to focus or providing help to studentadaptively. Methods which extract this information by directly interactingwith the user for example by asking him to rate documentfragments can lead to distraction while learning and require that usersanswer truthfully. In this work, we focus on implicit interest indicators,most importantly document scrolling and user’s gaze. With these,we designed a method for identification of interesting fragments ofdocument and tracking of fragments of web application. We proposedseveral scenarios for use of this method and evaluated some of them inexperiment with 34 students of our faculty. Main contribution of thiswork is in the utilization of users’ gaze in the web environment, incommon settings and with only commodity hardware.Student name: Dominik MackoThesis title: VHDL Digital Systems Model VisualizationSupervisor: Katarína Jelemenská, PhD.Defended on: May 2011Degree program: Computer Systems and NetworksAnnotation: This project is focused on the problem of visualization of digital systemsVHDL models and the display possibilities, existing design systemsand visualizers can offer. For more detail, they are analyzed thevisualizers, solved in diploma projects Visualization of VHDL modeland Visualization of VHDL description. The project deals with theproblem of VHDL model simulation and visualization of this simulation.The simulation visualization possibilities of the existing digitalsystems VHDL models simulators are analyzed. From the analysis ofvisualization problem, they are shown different possibilities of visualizationenvironment design procedure. In the design, it is necessary tochoose properly a VHDL description parser, a transient representationand a way of the simulation visualization of digital system VHDLmodel. The design and implementation of the extension to existingapplication VHDL Visualizer v5.0 are proposed. This extension isabout the simulation and the visualization of this simulation. This visualizationenvironment is also able to use some free external tools forfunctionality addition. Because of that, this visualizer also becomesthe strong verification tool.