64-megabit 2.7-volt Only Dual-interface DataFlash AT45DB642

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AT45DB642Detailed Bit-level Read Timing – Inactive Clock Polarity HighContinuous Array Read (Opcode: 68H)CSSCK 1 2 63 64 65 66 67tSUSI 0 1 X X XSOHIGH IMPEDANCEtVDATA OUTLSB MSBD7 D6 D5 D2 D1 D0 D7 D6 D5BIT 8447OFPAGE nBIT 0OFPAGE n+1Burst Array Read with Synchronous Delay (Opcode: 69H)CSSCK1 2 63 64 65 66 1 2 31 32 33tSU32 CLOCKSSI 0 1 X X XSOHIGH IMPEDANCEtVD7DATA OUTD6LSBMSBD1 D0 Don't CareD7 D6BIT 8447OFPAGE nBIT 0OFPAGE n+11638F–DFLSH–09/0223
Page 2: However, the use of either interfac
Page 5 and 6: AT45DB642As with the Continuous Arr
Page 7: AT45DB642BUFFER TO MAIN MEMORY PAGE
Page 10 and 11: This gives the DataFlash the abilit
Page 12 and 13: Table 1. Read CommandsCommand SCK/C
Page 14 and 15: Absolute Maximum Ratings*Temperatur
Page 16 and 17: AC Characteristics - Parallel Inter
Page 18 and 19: Reset Timing (Inactive Clock Polari
Page 20 and 21: Read OperationsThe following block
Page 24 and 25: Detailed Bit-level Read Timing - In
Page 26 and 27: Detailed Bit-level Read Timing - SP
Page 28 and 29: Detailed Bit-level Read Timing - SP
Page 30 and 31: Detailed Parallel Timing - SPI Mode
Page 32 and 33: Detailed Parallel Read Timing - SPI
Page 34 and 35: Figure 2. Algorithm for Randomly Mo
Page 36 and 37: Packaging Information40T - TSOPPIN

64-megabit 2.7-volt Only Dual-interface DataFlash AT45DB642

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