12.07.2015 Views

The Circuit Designer's Companion - diagramas.diagram...

The Circuit Designer's Companion - diagramas.diagram...

The Circuit Designer's Companion - diagramas.diagram...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Analogue integrated circuits 151R fCNon-invertingInvertingFigure 5.2 AC coupling to reduce offseton delays of several seconds.<strong>The</strong> second solution is to reduce the gain to a sensible value and cascade gainblocks. For instance, two ac-coupled gain blocks with a gain of 33 each, cascaded,would have the same performance but the offsets would be easily manageable. <strong>The</strong>bandwidth would also be improved, along with the out-of-band roll-off, if this werenecessary. Unfortunately, this solution adds components and therefore cost.A third solution is to use an amplifier with a better V OS specification. This willeither involve a tradeoff in gain-bandwidth, power consumption or other parameters, orcost. For instance, in the above example AD’s OP-227G with a maximum offset of180µV might be a suitable candidate, though it is noticeably more expensive. <strong>The</strong>overall cost might work out the same though, given the reduction in components overthe second solution.Offset driftOffset voltage drift is closely related to initial offset voltage and is a measure of howV OS changes with temperature and time. Most manufacturers will specify drift withtemperature, but only those offering precision devices will specify drift over time.Present technology for standard devices allows temperature coefficients of between 5and 40µV/˚C, with 10µV/˚C being typical. For bipolar inputs, the magnitude of drift isdirectly related to the initial offset at room temperature. A rule of thumb is 3.3µV/˚Cfor each millivolt of initial offset. This drift has to be added to the worst case offsetvoltage when calculating offset effects and can be significant when operating over awide temperature range.Early MOS-input op-amps suffered from poor offset voltage performance due togate threshold voltage shifts with time, temperature and applied gate voltage. Newprocesses, particularly developments in silicon gate technology, have overcome theseproblems and CMOS op-amps (Texas Instruments’ LinCMOS range for instance)can achieve bipolar-level V OS figures with extremely good drift, 1−2µV/˚C beingquoted.<strong>Circuit</strong> techniques to remove the effect of driftMicroprocessor control has allowed new analogue techniques to be developed and oneof these is the nulling of input amplifier offsets, as in Figure 5.3. With this techniquethe initial circuit offsets can be calibrated out of the system by applying a zero input,storing the resultant input value (which is the sum of the offsets) in non-volatilememory andd subsequently subtracting this from real time input values. With thistechnique, only offset drifts, not absolute offset values, are important. Alternatively, for

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!