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Digital circuits 185Current immunityThe noise immunity value gives meaning to the ability of the interface to withstandexternally-coupled noise without corruption of the perceived logic level. So forinstance the HCMOS-LSTTL interface can tolerate a variation of 2.4V in the high state,or 0.47V in the low state. These are worst-case values and the actual circuit couldtolerate somewhat more before a change of state occurred. But the voltage difference isonly part of the story. When noise is coupled into an interface, the impedance of theinterface is just as important, since this determines what voltage will be developed bya given induced interference current. The impedance is normally defined by the outputdriver (as long as transmission line effects are neglected) and the effective noise currentthreshold of the interface, given by the noise immunity voltage divided by the driveroutput impedance, gives a truer picture of the actual noise immunity of a givencombination.The metal-gate 4000B CMOS logic family has a high output impedance at 5Vcompared with the other families, so that its current immunity is significantly worse.However, as the supply voltage increases so its output impedance goes down, and thecombined effect means that its immunity at 15V V CC is about ten times better than at5V. It is inherently insensitive to low voltage inductively-coupled noise, but showspoor rejection of capacitively coupled noise. For general purpose 5V applications the74HC family is preferred. It is also true that a microcontroller’s high output resistancemeans that it does not compare favourably with standard logic.Use of a pull-upNote that the figures for high-state and low-state immunities are often different,because of the differing drive impedances and voltage thresholds in the two states. Anegative immunity value indicates that, if nothing further is done, this particularinterface combination will be unreliable by design. For instance, the 2.7V minimumhigh output of the venerable LS-TTL family is less than the required 3.15V minimumV IH for HCMOS so LS-TTL driving directly into HCMOS is in danger of incorrectlytransmitting the logic high level. The standard remedy for this particular situation (ifyou are still using LS-TTL!) is a pull-up resistor to V CC to ensure a higher output fromthe LS-TTL (Figure 6.3). The minimum resistor value is a function of the driver outputcapability, and the maximum value depends on permissible timing constraints.Alternatively, use the HCTMOS family, whose inputs are characterised especially fordriving from LS-TTL levels.Dynamic noise immunityThe static noise margins as discussed above apply until the interference approaches theoperating speed of the devices. When very fast interference is present, higher amplitudeV CC R min = [V CC − V OL ]/I OLRwhere I OL is the LS-TTL output sink currentfor an output voltage of V OL , lower than theHCMOS low input thresholdC nLS-TTLHCMOSFigure 6.3 Logic interface pull-up resistorR max = t/C nwhere t is the maximum edge rise time andC n is the node capacitance
186 The Circuit Designer’s Companionis necessary to induce upset. The dynamic noise margin is measured by applying aninterference pulse of known magnitude and increasing its width until the device justbegins to switch. This yields a plot of noise margin versus pulse width such as shownin Figure 6.4. The high level and low level dynamic noise margins may be different.Pulsevoltage VYou may often be forced to interface different logic families. Typically, a 3.3Vmicroprocessor may need to drive 5V buffers or vice versa, or you may not be able tosource a particular part in the same family as the rest of the system, or you may need tochange families to optimise speed/power product. You can normally expect logicinterfaces of the same family to be compatible, but whenever different families or acustom interface are used you have to check the logic threshold aspects of each one. Thevoltage level conversion issue is very common, to the extent that there are families ofdevices such as the 74LVT series which are characterised for an input range of 2.0V IHand 0.8V IL , but can still operate from a 5V rail; or vice versa, can accept 5V-swinginputs while being operated from a 3.3V rail.6.1.2 Fan-out and loading54321004 8 12Figure 6.4 Dynamic noise immunity of 74HC series devicesPulse width nsThe output voltage levels that are used to fix noise immunity thresholds are notabsolute. They depend as usual on temperature, but more importantly on the outputcurrent that the driver is required to source or sink. This in turn depends on the type ofloading that each output sees (Figure 6.5).+I INH , -I INLRI H = V H /R−I L = [V CC − V L ]/RFigure 6.5 Logic output loadingR+I H = ΣI INH−I L = ΣI INLAny driver has an output voltage versus current characteristic which saturates atsome level of loading (Figure 6.6). The characteristic is tailored so that at a given loadcurrent, the output voltage V OH or V OL is equivalent to the input threshold voltage (V IHor V IL ) plus the noise immunity for that particular logic family. This load current thencorresponds to the sum of the input currents for a given number N of standard gates ofthat family, and N is called the “fan-out”: that number of standard gates that the outputcan drive and still keep the interface within the noise threshold limits. The fan-out is
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The Circuit Designer’s Companion
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NewnesAn imprint of ElsevierLinacre
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vi Contents2.2 Design rules 452.2.1
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viii ContentsChapter 5Analogue inte
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x Contents7.5.3 Secondary cells 256
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xii Contents
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2 The Circuit Designer’s Companio
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10 The Circuit Designer’s Compani
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Grounding and wiring 25Cable type R
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Grounding and wiring 27Shielding an
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Grounding and wiring 29successive h
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Grounding and wiring 31(a) Two audi
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Grounding and wiring 331. Side-by-s
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Grounding and wiring 35ABV pZ out =
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Grounding and wiring 37times will d
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Grounding and wiring 39of Z o . Thu
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Printed circuits 41material. The co
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Printed circuits 43board cost you s
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Printed circuits 45Board ABoard ABo
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Printed circuits 47which they can w
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Table 3.3 Survey of capacitor types
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100 The Circuit Designer’s Compan
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334 Indexde-rating 310dielectric ab
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336 IndexFlash ADC 209Foldback curr
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338 IndexMultilayer PCB constructio
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340 Indexlimiting element voltage 7
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