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The Circuit Designer's Companion - diagramas.diagram...

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276 <strong>The</strong> <strong>Circuit</strong> Designer’s <strong>Companion</strong>Harmonic amplitude envelopet r1/T20 dB/decade40 dB/decade1/ t rTf0dB-10-20-30-40-50-60-70-805 MHz, 8 ns tr5 MHz, 1 ns tr1 10 MHz 100 1000a)b)Figure 8.9 Harmonic amplitudes for a trapezoidal waveshapefrequency. Lowest is best. You may be able to use low frequency multi-phase clocksrather than a single high-frequency one. In some circumstances changing the spotfrequency of the clock slightly may move its harmonics sufficiently far away from aparticularly susceptible frequency, though this is more a case of EMC within a systemthan of meeting emission regulations.<strong>The</strong> power supply rails also contribute significantly to RF disturbance problems withdigital circuits. Section 6.1.3 discussed induced switching noise, which appears on boththe ground and power rails. This must be prevented from propagating outside theimmediate circuit area; the solution is a solid, unbroken ground plane in conjunction withlocal power plane segments (section 2.2.4) and thorough decoupling of these segments(section 6.1.4). As well as controlling emissions, this also prevents susceptibility toincoming RF and transients, so it should be applied even on low-speed circuits for bestimmunity.8.4.2 Analogue circuitsAs we have seen elsewhere (section 5.2.10), analogue circuits are also capable ofunexpected oscillation at radio frequencies. Gain stages should be properly decoupled,loaded and laid out to avoid this. Check them at the prototype stage with a high-frequency’scope or spectrum analyser, even if nothing appears to be wrong with the circuitfunction. Ringing on pulses transmitted along un-terminated transmission lines willgenerate frequencies which are related only to the length of the lines with perhapssufficient amplitude to be troublesome. Terminate all long lines, particularly if they endat a CMOS input, which provides no inherent termination.Good RF and transient immunity at interfaces calls for a consideration of signalbandwidth, balance and level. Any cable connecting to a piece of equipment will conductinterference straight into the circuit and it is at the interface that protection is needed. Thisis achieved at the circuit design level by a number of possible strategies:• minimise the signal bandwidth by passive RC or ferrite filtering, so thatinterfering signals outside the wanted frequency range are rejected – everyanalogue amplifier should have some intentional bandwidth limitation;• operate the interface at the highest possible power or voltage level consistentwith other requirements, such as dynamic range, so that relatively more

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