VOICE OF THE ENGINEER - ElectronicsAndBooks

tures, the netlists go through the samegate-, physical-, or process-level optimizationin the back end. You need notchange design flows or design-databaseformats except for adding a new knowledgebase—a synthetic-library database(.sldb file)—to the RTL-synthesisstage. The power savings increase thedesign project’s original power strategyby as much as 42% additional power reductionat the block level and as muchas 24% reduction at the chip level.This architecture-level power-optimizationapproach does have somelimitations, however. To get the powerbenefit, you must integrate in-houseor third-party IP (intellectual property)into the design at the RTL because theoptimization takes place at the RTL.TO LOWER THE ENER-GY CONSUMPTIONOF YOUR NEXT SOCPROJECT, YOU MUSTIDENTIFY WHICH POR-TIONS OF THE SOCARE CONSUMING THEMOST ENERGY.The automatic IP insertion relies ona logic-synthesis tool, such as DesignCompiler, to extract the datapath architecturefrom the RTL; therefore, thecode must be in a style that the synthesistool recognizes. In other words, ifthe datapath is in low-level RTL thatalready prescribes the architectures, thesynthesis tool cannot alter the design’sintent.To enable architectural-level poweroptimization, designers should startfrom high-level RTL code using asmuch operator inference as possible.To allow extraction of larger datapathblocks, you should consider using automaticretiming instead of manually insertinga pipeline. Whenever possible,use a realistic representative switchingprofile, which usually improves the result,especially for applications thathave unevenly distributed activities onthe input.Because power is a physical-domaincharacteristic, your standard-cell librarycan affect the power-optimizationresult. A standard-cell library with acollection of datapath cells that havegood drive strength and threshold-voltagevariations allows wider architectureselections.Some libraries support special datapathcells but have few or no drivestrengthvariations or have them onlywith standard threshold-voltage implementations.You often do not selectthese cells, therefore limiting the numberof available architectures. To improveresults, use a standard-cell librarywith more drive strength and threshold-voltagevariations that have accuratelycharacterized power numbers.You can’t optimize what you can’tobserve. To lower the energy consumptionof your next SOC project, youmust first identify which portions of theSOC are consuming the most energy.It is worth distinguishing power consumptionfrom energy consumption. Toget a more energy-efficient design, youmust pay attention to the circuits thatremain on for a long time. Therefore,you must carefully analyze the powermodes to identify the best energy-savingopportunities.When working on these modules,decide early in the chip-planning stageto run these circuits at low clock frequenciesand low voltage. The additionalpower-saving opportunitiesmust come from designing more power-friendlycircuits that require lessswitching activities and are built witha higher percentage of low-leakage andlow-drive cells. The most inexpensiveway of achieving this goal is by usingpower-friendly architectures that requireno costly design-flow re-engineeringefforts.EDNAUTHOR’S BIOGRAPHYJay Chiang is product-marketing director atSynopsys, where he has worked for 11 years.He is responsible for managing the Design-Ware library and the datapath-generator,JPEG, microcontroller, mobile-industryprocessorinterface, and memory-IP productlines. Before joining Synopsys, Chiangwas a senior ASIC designer and chiparchitect at Xinex and a hardware-designengineer at Dynapro. He has a master’sdegree in management for science andtechnology from Oregon Health and ScienceUniversity (Portland, OR) and abachelor’s degree from National Tsing HuaUniversity (Hsinchu, Taiwan).AC-DC ConvertersPower Factor Corrected5-300VdcIsolated DC OutputLow CostIndustrialTwo Units in OneAC1 SeriesUniversal AC Input47-400HzInput Frequency• STANDARD: 5 to 300 vdcregulated, ISOLATEDoutputs/Fixed frequency• ALL in ONE compact full brickmodule, 2.5" x 4.6" x 0.8" Vacuumencapsulated for use in ruggedenvironments• Lower cost for your Industrialapplications• Maximize your design up to300 watt models• Meets Harmonic Distortionspecifications• .99 Power factor rating atoperational levels• Expanded operating temperaturesavailable -40 & -55C, +85 & 100Cbase plate• Custom models availableUP TO300WATTSwww.picoelectronics.comSend Directfor free PICO CatalogE-Mail: info@picoelectronics.comPICO Electronics,Inc.143 Sparks Ave, Pelham, NY 10803-1837Call Toll Free 800-431-1064 • FAX 914-738-8225