TASKING VX-toolset for ARM User Guide

TASKING VX-toolset for ARM User Guidemkarm test.absmkarm -fmymake.mak test.absBy default the make utility reads the file makefile so you do not need to specify it on the command line.If you want to use another name for the makefile, use the option -f.If you do not specify a target, mkarm uses the first target defined in the makefile. In this example it wouldbuild test.src instead of test.abs.Based on the sample invocation, the make utility now tries to build test.abs based on the makefile andperforms the following steps:1. From the makefile the make utility reads that test.abs depends on test.obj.2. If test.obj does not exist or is out-of-date, the make utility first tries to build this file and reads fromthe makefile that test.obj depends on test.src.3. If test.src does exist, the make utility now creates test.obj by executing the rule for it: asarmtest.src.4. There are no other files necessary to create test.abs so the make utility now can use test.obj tocreate test.abs by executing the rule: lkarm test.obj -o test.abs ...The make utility has now built test.abs but it only used the assembler to update test.obj and thelinker to create test.abs.If you compare this to the control program:ccarm test.cThis invocation has the same effect but now all files are recompiled (assembled, linked and located).10.2.1. Calling the Make UtilityYou can only call the make utility from the command line. The invocation syntax is:mkarm [ [option]... [target]... [macro=def]... ]For example:mkarm test.abstargetmacro=defYou can specify any target that is defined in the makefile. A target can also be oneof the intermediate files specified in the makefile.Macro definition. This definition remains fixed for the mkarm invocation. It overridesany regular definitions for the specified macro within the makefiles and from theenvironment. It is inherited by subordinate mkarm's but act as an environment variablefor these. That is, depending on the -e setting, it may be overridden by a makefiledefinition.238