13.07.2015 Views

Cadence VIP Catalog - Europractice

Cadence VIP Catalog - Europractice

Cadence VIP Catalog - Europractice

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

<strong>Cadence</strong> <strong>VIP</strong> <strong>Catalog</strong>Accelerated <strong>VIP</strong>To provide users high-end verificationperformance, many <strong>VIP</strong> <strong>Catalog</strong> productssupport accelerated verification using thePalladium platform. This enables usersto tradeoff verification functionality forspeed as they progress from block to chipto system-level verification.<strong>Cadence</strong> Accelerated <strong>VIP</strong> supports threedifferent use modes. These are transactionbasedC acceleration, transaction-basedUVM acceleration, and signal-based UVMacceleration. The C acceleration modeprovides the absolute highest performanceand throughput for system-level verification.The UVM acceleration modes enablereuse of the simulation testbench and ahigher degree of verification capability.This allows users to tradeoff performanceand verification capability to meet theirneeds at each stage in the design process.Advantages of <strong>Cadence</strong>Accelerated <strong>VIP</strong>• Easy to control tradeoff betweenperformance and verification capability• C acceleration mode for maximumperformance and throughput• UVM acceleration mode for maximumtestbench reuse• Verifies protocol compliance duringsimulation and accelerationFlexible Packaging<strong>Cadence</strong> <strong>VIP</strong> <strong>Catalog</strong> provides flexibility inproduct licensing to meet a wide range ofneeds. All <strong>VIP</strong> are available as individuala-la-carte licenses for dedicated protocolverification. The <strong>VIP</strong> and memory modelsare also available in portfolios to provide acost-effective solution for customers verifyingSoCs containing multiple protocolsor developing a range of projects whoseprotocol requirements vary over time.<strong>Cadence</strong> Services and Support• More information regarding<strong>Cadence</strong> <strong>VIP</strong> <strong>Catalog</strong> is available at:http://www.cadence.com/products/fv/ verification_ip• Hands-on demos of <strong>Cadence</strong>Verification IP are available at theXuropa online community:www.xuropa.com/cadenceIP• <strong>Cadence</strong> application engineers cananswer your technical questions bytelephone, email, or Internet—they canalso provide technical assistance andcustom training• <strong>Cadence</strong> Online Support gives you 24x7online access to a knowledgebase ofthe latest solutions, technical documentation,software downloads, and moreModest Verification Speed HighAccelerated <strong>VIP</strong>High Verification Functionality ModestSystemFigure 4: Accelerated <strong>VIP</strong> enables users to control tradeoffs between verification capability andperformanceUse ModelUser InterfacePerformanceEnvironmentReuseVerificationFunctionalityCompliance ManagementSystem (CMS)Signal-BasedAccelerationUVMModestHighHigh(Protocol Verification)UVM User InterfaceComplete ProtocolFunctional CoverageConstrained RandomTest GenerationComplete ProtocolCheckingTestbench BFMSignal InterfaceRTL DUTIES or PalladiumFigure 5: Three verification IP acceleration use modesUVMMediumHighMedium-HighUVM User InterfaceStreamlinedFunctional CoverageStreamlinedTest GenerationStreamlinedCheckingTransaction InterfaceSynthesizable BFMRTL DUTPalladiumTransaction-BasedAccelerationCHighModestModest(System DataflowVerification)C User InterfaceTransaction InterfaceSynthesizable BFMRTL DUTPalladium<strong>Cadence</strong> is transforming the global electronics industry through a vision called EDA360.With an application-driven approach to design, our software, hardware, IP, and services helpcustomers realize silicon, SoCs, and complete systems efficiently and profitably. www.cadence.com© 2011 <strong>Cadence</strong> Design Systems, Inc. All rights reserved. <strong>Cadence</strong> and the <strong>Cadence</strong> logo are registered trademarks of <strong>Cadence</strong> Design Systems, Inc.All others are properties of their respective holders. ARM and AMBA are trademarks of ARM Holdings Ltd. 21969D4 06/11 PC/IW/PDF

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!