12-2022

Signal Quality Analyzer Supports
PCI Express 6.0 Base Specification Rx Test
Anritsu Corporation announced
that its Signal Quality Analyzer-
R MP1900A now supports the
PCI Express 6.0 (PCIe 6.0) Base
Specification Receiver Test (Rx
Test). As well as adding support
for generating PCIe 6.0 Base
Spec. Compliance Test patterns,
the MP1900A certified
PCIe 3.0/4.0/5.0 tester now has
an SKP function to filter SKP
packets to support separate clock
architecture (SRNS). This update
offers customers an efficient test
solution meeting their design
requirements by including automation
software to calibrate the
stressed test signal and measure
jitter tolerance using real-time
oscilloscopes from collaborating
partners. As a result, one
MP1900A now covers tests from
PCIe 3.0 to PCIe 6.0.
Focus on the PCIe 6.0 Base
Spec. Compliance Test
The spread of 5G services facilitating
large data communications
at high speeds is driving rapid
evolution of new technologies,
such as edge computing, IoT, and
AI. At the same time, the internal
interfaces of transmission
equipment, servers, and storage
in data centers forming the base
of this technical revolution are
switching to the faster and larger
capacity PCIe standard.
Following completion of the
PCIe 6.0 Base Specification in
January 2022, development of
the CEM specification to assure
compatible connections is progressing
ahead of the start of
correlation tests in 2023. Since
the PCIe 6.0 standard is the
first to support new technologies,
such as PAM4 modulation
and Forward Error Correction
(FEC), it requires test methods
for evaluating the quality of 32
Gbaud PAM4 signals with a
1/3rds smaller Eye opening, as
well as for measuring the BER
and evaluating FEC.
About MP1900A
The MP1900A is a high-performance
BERT for Rx tests
of high-speed computing and
data communications interfaces
including PCIe, USB, Thunderbolt,
and 400/800GbE. Link
Training and LTSSM functions
are supported by an industry-best
level PPG for high-quality waveforms,
high-sensitivity input ED,
high-accuracy jitter generation
source (SJ, RJ, SSC, BUJ), and
CM-I/DM-I, facilitating various
applications, including Compliance
and Margin tests as well as
troubleshooting.
Key Features:
• supports PCIe 6.0 Base Spec.
design inspection requirement
• provides each Preset and Compliance
Test pattern required
by PCIe 6.0 as well as builtin
SKP filter function for
common and separate clocks
(SRNS) plus real-time FEC
Uncorrectable error measurement
• cuts test time using automation
for efficient evaluation
• automates stressed signal calibration
and BER measurement
using automation software.
• adds excellent performance
and expandability
• supports device margin tests
with measurement functions
including high-quality PPG
waveforms, high-sensitivity
reception PAM4 ED, and
generation of various jitter
types; multi-channel platform
and software architecture facilitate
expansion to future PCIe
6.0 CEM specification
■ Anritsu Corporation
www.anritsu.com
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