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C8051F326/7 - Silicon Labs

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15.2. C2 Pin Sharing<br />

<strong>C8051F326</strong>/7<br />

The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and<br />

Flash programming may be performed. This is possible because C2 communication is typically performed<br />

when the device is in the halt state, where all on-chip peripherals and user software are stalled. In this<br />

halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P3.0) pins. In most applications,<br />

external resistors are required to isolate C2 interface traffic from the user application. A typical isolation<br />

configuration is shown in Figure 15.1.<br />

/Reset (a)<br />

Input (b)<br />

Output (c)<br />

C2 Interface Master<br />

Figure 15.1. Typical C2 Pin Sharing<br />

The configuration in Figure 15.1 assumes the following:<br />

<strong>C8051F326</strong>/7<br />

C2CK<br />

C2D<br />

1. The user input (b) cannot change state while the target device is halted.<br />

2. The /RST pin on the target device is used as an input only.<br />

Additional resistors may be necessary depending on the specific application.<br />

Rev. 1.1 137

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