General Computer Science 320201 GenCS I & II Lecture ... - Kwarc

The Full Adder
Definition 415 The 1-bit full adder is a circuit FA 1
that implements the function f 1 FA : B × B × B → B2
with (FA 1 (a, b, c ′ )) = B(〈〈a〉〉 + 〈〈b〉〉 + 〈〈c ′ 〉〉)
The result of the full-adder is also denoted with 〈c, s〉,
i.e., a carry and a sum bit. The bit c ′ is called the input
carry.
the easiest way to implement a full adder is to use two
half adders and an OR gate.
Lemma 416 (Cost and Depth)
C(FA 1 ) = 2C(HA) + 1 = 5 and
dp(FA 1 ) = 2dp(HA) + 1 = 3
c’
a
b
HA
s
c
HA
s
c
s
c
c○: Michael Kohlhase 244
a b c ′ c s
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Of course adding single digits is a rather simple task, and hardly worth the effort, if this is all we
can do. What we are really after, are circuits that will add n-bit binary natural numbers, so that
we arrive at computer chips that can add long numbers for us.
Full n-bit Adder
Definition 417 An n-bit full adder (n > 1) is a circuit that corresponds to
f n FA : Bn × B n × B → B × B n ; 〈a, b, c ′ 〉 ↦→ B(〈〈a〉〉 + 〈〈b〉〉 + 〈〈c ′ 〉〉)
Notation 418 We will draw the n-bit full adder with the following symbol in circuit diagrams.
Note that we are abbreviating n-bit input
and output edges with a single one that
has a slash and the number n next to it.
There are various implementations of the full n-bit adder, we will look at two of them
c○: Michael Kohlhase 245
This implementation follows the intuition behind elementary school addition (only for binary
numbers): we write the numbers below each other in a tabulated fashion, and from the least
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